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provided __asm version of assembly code for atomic atomic operations for better compatibility. (this is a temporary resolution so that this one won't block other tests. we'll revisit this change when we figure out performance implication of the __asm version.)
170 lines
5.4 KiB
C
170 lines
5.4 KiB
C
/*
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* Copyright (C) 2005 Internet Systems Consortium, Inc. ("ISC")
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH
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* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT,
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* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
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* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/* $Id: atomic.h,v 1.2.2.2 2005/06/16 22:01:01 jinmei Exp $ */
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/*
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* This code was written based on FreeBSD's kernel source whose copyright
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* follows:
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*/
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/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/sys/alpha/include/atomic.h,v 1.18.6.1 2004/09/13 21:52:04 wilko Exp $
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*/
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#ifndef ISC_ATOMIC_H
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#define ISC_ATOMIC_H 1
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#include <isc/platform.h>
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#include <isc/types.h>
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#ifdef ISC_PLATFORM_USEOSFASM
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#include <c_asm.h>
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#pragma intrinsic(asm)
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/*
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* This routine atomically increments the value stored in 'p' by 'val', and
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* returns the previous value.
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*/
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static inline isc_int32_t
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isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
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return (asm("1:"
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"ldl_l %t0, 0(%a0);" /* load old value */
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"mov %t0, %v0;" /* copy the old value */
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"addl %t0, %a1, %t0;" /* calculate new value */
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"stl_c %t0, 0(%a0);" /* attempt to store */
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"beq %t0, 1b;", /* spin if failed */
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p, val));
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}
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/*
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* This routine atomically stores the value 'val' in 'p'.
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*/
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static inline void
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isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
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(void)asm("1:"
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"ldl_l %t0, 0(%a0);" /* load old value */
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"mov %a1, %t0;" /* value to store */
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"stl_c %t0, 0(%a0);" /* attempt to store */
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"beq %t0, 1b;", /* spin if failed */
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p, val);
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}
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/*
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* This routine atomically replaces the value in 'p' with 'val', if the
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* original value is equal to 'cmpval'. The original value is returned in any
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* case.
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*/
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static inline isc_int32_t
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isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
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return(asm("1:"
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"ldl_l %t0, 0(%a0);" /* load old value */
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"mov %t0, %v0;" /* copy the old value */
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"cmpeq %t0, %a1, %t0;" /* compare */
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"beq %t0, 2f;" /* exit if not equal */
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"mov %a2, %t0;" /* value to store */
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"stl_c %t0, 0(%a0);" /* attempt to store */
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"beq %t0, 1b;" /* if it failed, spin */
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"2:",
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p, cmpval, val));
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}
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#elif defined (ISC_PLATFORM_USEGCCASM)
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static inline isc_int32_t
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isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
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isc_int32_t temp, prev;
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__asm__ volatile(
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"1:"
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"ldl_l %0, %1;" /* load old value */
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"mov %0, %2;" /* copy the old value */
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"addl %0, %3, %0;" /* calculate new value */
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"stl_c %0, %1;" /* attempt to store */
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"beq %0, 1b;" /* spin if failed */
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: "=&r"(temp), "+m"(*p), "=r"(prev)
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: "r"(val)
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: "memory");
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return (prev);
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}
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static inline void
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isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
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isc_int32_t temp;
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__asm__ volatile(
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"1:"
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"ldl_l %0, %1;" /* load old value */
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"mov %2, %0;" /* value to store */
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"stl_c %0, %1;" /* attempt to store */
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"beq %0, 1b;" /* if it failed, spin */
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: "=&r"(temp), "+m"(*p)
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: "r"(val)
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: "memory");
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}
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static inline isc_int32_t
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isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
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isc_int32_t temp, prev;
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__asm__ volatile(
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"1:"
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"ldl_l %0, %1;" /* load old value */
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"mov %0, %2;" /* copy the old value */
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"cmpeq %0, %3, %0;" /* compare */
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"beq %0, 2f;" /* exit if not equal */
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"mov %4, %0;" /* value to store */
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"stl_c %0, %1;" /* attempt to store */
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"beq %0, 1b;" /* if it failed, spin */
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"2:"
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: "=&r"(temp), "+m"(*p), "=r"(prev)
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: "r"(cmpval), "r"(val)
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: "memory");
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return (prev);
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}
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#else
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#error "unsupported compiler. disable atomic ops by --disable-atomic"
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#endif
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#endif /* ISC_ATOMIC_H */
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