Thomas Waldmann 3d3f3500f9 crc32: deal with unaligned buffer, tests, fixes #3317 ... fixing only the (generic) slice-by-8 crc32 implementation, it is assumed that CPUs supporting CLMUL can also efficiently and correctly deal with unaligned accesses. slice-by-8 is used e.g. on ARM cpus and they might not (efficiently) support unaligned memory access, leading to bus errors or low performance. (cherry picked from commit f9cd6f7512)		2017-11-14 15:33:28 +01:00
..
blake2	move blake2 to borg/algorithms	2017-05-02 18:53:54 +02:00
xxh64	file_integrity: use xxh64	2017-06-01 21:26:42 +02:00
__init__.py	borg.algorithms definition	2017-06-07 23:53:19 +02:00
blake2-libselect.h	move blake2 to borg/algorithms	2017-05-02 18:53:54 +02:00
checksums.pyx	algorithms: rename crc32 to checksums	2017-06-01 21:26:42 +02:00
crc32_clmul.c	create package borg.algorithms with borg.algorithms.crc32 module	2017-05-02 18:53:54 +02:00
crc32_dispatch.c	algorithms.checksums: work around GCC 4.4 bug by disabling CLMUL	2017-06-05 15:07:49 +02:00
crc32_slice_by_8.c	crc32: deal with unaligned buffer, tests, fixes #3317	2017-11-14 15:33:28 +01:00