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During TSC synchronization test, use rdtsc() rather than rdtsc32(), to

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protect against 32-bit TSC overflow while the sync test is running.

On dual-socket Xeon E5-2600 (SNB) systems with up to 32 threads, there
is non-trivial chance (2-3%) that TSC synchronization test fails due to
32-bit TSC overflow while the synchronization test is running.

Sponsored by: Intel
Reviewed by: jkim
Discussed with: jkim, kib
This commit is contained in:
Jim Harris 2012-08-07 23:16:11 +00:00
parent 82a6ae1009
commit 7bfcb3bb9b
1 changed files with 5 additions and 5 deletions
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10
sys/x86/x86/tsc.c
View file

@ -363,11 +363,11 @@ init_TSC(void)
static void \
tsc_read_##x(void *arg) \
{ \
uint32_t *tsc = arg; \
uint64_t *tsc = arg; \
u_int cpu = PCPU_GET(cpuid); \
\
__asm __volatile("cpuid" : : : "eax", "ebx", "ecx", "edx"); \
tsc[cpu * 3 + x] = rdtsc32(); \
tsc[cpu * 3 + x] = rdtsc(); \
}
TSC_READ(0)
TSC_READ(1)
@ -379,8 +379,8 @@ TSC_READ(2)
static void
comp_smp_tsc(void *arg)
{
uint32_t *tsc;
int32_t d1, d2;
uint64_t *tsc;
int64_t d1, d2;
u_int cpu = PCPU_GET(cpuid);
u_int i, j, size;
@ -401,7 +401,7 @@ comp_smp_tsc(void *arg)
static int
test_smp_tsc(void)
{
uint32_t *data, *tsc;
uint64_t *data, *tsc;
u_int i, size;
if (!smp_tsc && !tsc_is_invariant)