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driver for neomagic 256av and 256zx
Obtained from: anonymous author, heavily derived
This commit is contained in:
Cameron Grant
parent
bf8ca271a3
commit
d5fa8408e6
3 changed files with 5393 additions and 0 deletions
4638
sys/dev/sound/pci/neomagic-coeff.h
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4638
sys/dev/sound/pci/neomagic-coeff.h
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File diff suppressed because it is too large
Load diff
641
sys/dev/sound/pci/neomagic.c
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641
sys/dev/sound/pci/neomagic.c
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@ -0,0 +1,641 @@
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/*
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* Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
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* All rights reserved.
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*
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* Derived from the public domain Linux driver
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "pci.h"
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#include "pcm.h"
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#include <dev/sound/pcm/sound.h>
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#include <dev/sound/pcm/ac97.h>
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#include <dev/sound/pci/neomagic.h>
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#include <dev/sound/pci/neomagic-coeff.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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/* -------------------------------------------------------------------- */
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#define NM_BUFFSIZE 16384
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#define NM256AV_PCI_ID 0x800510c8
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#define NM256ZX_PCI_ID 0x800610c8
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struct sc_info;
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/* channel registers */
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struct sc_chinfo {
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int spd, dir, fmt;
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snd_dbuf *buffer;
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pcm_channel *channel;
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struct sc_info *parent;
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};
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/* device private data */
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struct sc_info {
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device_t dev;
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u_int32_t type;
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struct resource *reg, *irq, *buf;
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int regid, irqid, bufid;
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void *ih;
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u_int32_t ac97_base, ac97_status, ac97_busy;
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u_int32_t buftop, pbuf, rbuf, cbuf, acbuf;
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u_int32_t playint, recint, misc1int, misc2int;
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u_int32_t irsz, badintr;
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struct sc_chinfo pch, rch;
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};
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/* -------------------------------------------------------------------- */
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/*
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* prototypes
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*/
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/* channel interface */
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static void *nmchan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir);
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static int nmchan_setdir(void *data, int dir);
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static int nmchan_setformat(void *data, u_int32_t format);
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static int nmchan_setspeed(void *data, u_int32_t speed);
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static int nmchan_setblocksize(void *data, u_int32_t blocksize);
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static int nmchan_trigger(void *data, int go);
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static int nmchan_getptr(void *data);
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static pcmchan_caps *nmchan_getcaps(void *data);
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static int nm_waitcd(struct sc_info *sc);
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/* talk to the codec - called from ac97.c */
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static u_int32_t nm_rdcd(void *, int);
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static void nm_wrcd(void *, int, u_int32_t);
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/* stuff */
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static int nm_loadcoeff(struct sc_info *sc, int dir, int num);
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static int nm_setch(struct sc_chinfo *ch);
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static int nm_init(struct sc_info *);
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static void nm_intr(void *);
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/* talk to the card */
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static u_int32_t nm_rd(struct sc_info *, int, int);
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static void nm_wr(struct sc_info *, int, u_int32_t, int);
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static u_int32_t nm_rdbuf(struct sc_info *, int, int);
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static void nm_wrbuf(struct sc_info *, int, u_int32_t, int);
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/* The actual rates supported by the card. */
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static int samplerates[9] = {
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8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000, 99999999
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};
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/* -------------------------------------------------------------------- */
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static pcmchan_caps nm_caps = {
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4000, 48000,
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AFMT_STEREO | AFMT_U8 | AFMT_S16_LE,
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AFMT_STEREO | AFMT_S16_LE
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};
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static pcm_channel nm_chantemplate = {
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nmchan_init,
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nmchan_setdir,
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nmchan_setformat,
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nmchan_setspeed,
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nmchan_setblocksize,
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nmchan_trigger,
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nmchan_getptr,
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nmchan_getcaps,
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};
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/* -------------------------------------------------------------------- */
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/* Hardware */
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static u_int32_t
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nm_rd(struct sc_info *sc, int regno, int size)
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{
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bus_space_tag_t st = rman_get_bustag(sc->reg);
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bus_space_handle_t sh = rman_get_bushandle(sc->reg);
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switch (size) {
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case 1:
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return bus_space_read_1(st, sh, regno);
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case 2:
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return bus_space_read_2(st, sh, regno);
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case 4:
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return bus_space_read_4(st, sh, regno);
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default:
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return 0xffffffff;
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}
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}
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static void
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nm_wr(struct sc_info *sc, int regno, u_int32_t data, int size)
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{
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bus_space_tag_t st = rman_get_bustag(sc->reg);
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bus_space_handle_t sh = rman_get_bushandle(sc->reg);
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switch (size) {
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case 1:
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bus_space_write_1(st, sh, regno, data);
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break;
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case 2:
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bus_space_write_2(st, sh, regno, data);
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break;
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case 4:
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bus_space_write_4(st, sh, regno, data);
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break;
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}
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}
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static u_int32_t
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nm_rdbuf(struct sc_info *sc, int regno, int size)
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{
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bus_space_tag_t st = rman_get_bustag(sc->buf);
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bus_space_handle_t sh = rman_get_bushandle(sc->buf);
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switch (size) {
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case 1:
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return bus_space_read_1(st, sh, regno);
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case 2:
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return bus_space_read_2(st, sh, regno);
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case 4:
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return bus_space_read_4(st, sh, regno);
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default:
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return 0xffffffff;
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}
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}
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static void
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nm_wrbuf(struct sc_info *sc, int regno, u_int32_t data, int size)
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{
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bus_space_tag_t st = rman_get_bustag(sc->buf);
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bus_space_handle_t sh = rman_get_bushandle(sc->buf);
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switch (size) {
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case 1:
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bus_space_write_1(st, sh, regno, data);
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break;
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case 2:
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bus_space_write_2(st, sh, regno, data);
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break;
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case 4:
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bus_space_write_4(st, sh, regno, data);
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break;
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}
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}
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/* ac97 codec */
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static int
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nm_waitcd(struct sc_info *sc)
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{
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int cnt = 10;
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while (cnt-- > 0) {
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if (nm_rd(sc, sc->ac97_status, 2) & sc->ac97_busy)
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DELAY(100);
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else
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break;
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}
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return (nm_rd(sc, sc->ac97_status, 2) & sc->ac97_busy);
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}
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static u_int32_t
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nm_rdcd(void *devinfo, int regno)
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{
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struct sc_info *sc = (struct sc_info *)devinfo;
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u_int32_t x;
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if (!nm_waitcd(sc)) {
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x = nm_rd(sc, sc->ac97_base + regno, 2);
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DELAY(1000);
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return x;
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} else {
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device_printf(sc->dev, "ac97 codec not ready\n");
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return 0xffffffff;
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}
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}
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static void
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nm_wrcd(void *devinfo, int regno, u_int32_t data)
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{
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struct sc_info *sc = (struct sc_info *)devinfo;
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int cnt = 3;
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if (!nm_waitcd(sc)) {
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while (cnt-- > 0) {
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nm_wr(sc, sc->ac97_base + regno, data, 2);
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if (!nm_waitcd(sc)) {
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DELAY(1000);
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return;
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}
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}
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}
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device_printf(sc->dev, "ac97 codec not ready\n");
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}
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static void
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nm_ackint(struct sc_info *sc, u_int32_t num)
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{
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if (sc->type == NM256AV_PCI_ID) {
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nm_wr(sc, NM_INT_REG, num << 1, 2);
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} else if (sc->type == NM256ZX_PCI_ID) {
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nm_wr(sc, NM_INT_REG, num, 4);
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}
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}
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static int
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nm_loadcoeff(struct sc_info *sc, int dir, int num)
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{
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int ofs, sz, i;
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u_int32_t addr;
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addr = (dir == PCMDIR_PLAY)? 0x01c : 0x21c;
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if (dir == PCMDIR_REC)
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num += 8;
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sz = coefficientSizes[num];
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ofs = 0;
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while (num-- > 0)
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ofs+= coefficientSizes[num];
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for (i = 0; i < sz; i++)
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nm_wrbuf(sc, sc->cbuf + i, coefficients[ofs + i], 1);
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nm_wr(sc, addr, sc->cbuf, 4);
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if (dir == PCMDIR_PLAY)
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sz--;
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nm_wr(sc, addr + 4, sc->cbuf + sz, 4);
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return 0;
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}
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static int
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nm_setch(struct sc_chinfo *ch)
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{
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struct sc_info *sc = ch->parent;
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u_int32_t base;
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u_int8_t x;
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for (x = 0; x < 8; x++)
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if (ch->spd < (samplerates[x] + samplerates[x + 1]) / 2)
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break;
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if (x == 8) return 1;
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ch->spd = samplerates[x];
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nm_loadcoeff(sc, ch->dir, x);
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x <<= 4;
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x &= NM_RATE_MASK;
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if (ch->fmt & AFMT_16BIT) x |= NM_RATE_BITS_16;
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if (ch->fmt & AFMT_STEREO) x |= NM_RATE_STEREO;
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base = (ch->dir == PCMDIR_PLAY)? NM_PLAYBACK_REG_OFFSET : NM_RECORD_REG_OFFSET;
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nm_wr(sc, base + NM_RATE_REG_OFFSET, x, 1);
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return 0;
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}
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/* channel interface */
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static void *
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nmchan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir)
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{
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struct sc_info *sc = devinfo;
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struct sc_chinfo *ch;
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u_int32_t chnbuf;
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chnbuf = (dir == PCMDIR_PLAY)? sc->pbuf : sc->rbuf;
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ch = (dir == PCMDIR_PLAY)? &sc->pch : &sc->rch;
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ch->buffer = b;
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ch->buffer->bufsize = NM_BUFFSIZE;
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ch->buffer->buf = (u_int8_t *)(rman_get_bushandle(sc->buf) + chnbuf);
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device_printf(sc->dev, "%s buf %p\n", (dir == PCMDIR_PLAY)? "play" : "rec", ch->buffer->buf);
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ch->parent = sc;
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ch->channel = c;
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ch->dir = dir;
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return ch;
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}
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static int
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nmchan_setdir(void *data, int dir)
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{
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return 0;
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}
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static int
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nmchan_setformat(void *data, u_int32_t format)
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{
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struct sc_chinfo *ch = data;
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ch->fmt = format;
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return nm_setch(ch);
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}
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static int
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nmchan_setspeed(void *data, u_int32_t speed)
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{
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struct sc_chinfo *ch = data;
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ch->spd = speed;
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return nm_setch(ch);
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}
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static int
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nmchan_setblocksize(void *data, u_int32_t blocksize)
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{
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return blocksize;
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}
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static int
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nmchan_trigger(void *data, int go)
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{
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struct sc_chinfo *ch = data;
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struct sc_info *sc = ch->parent;
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int ssz;
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if (go == PCMTRIG_EMLDMAWR) return 0;
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ssz = (ch->fmt & AFMT_16BIT)? 2 : 1;
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if (ch->fmt & AFMT_STEREO)
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ssz <<= 1;
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if (ch->dir == PCMDIR_PLAY) {
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if (go == PCMTRIG_START) {
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nm_wr(sc, NM_PBUFFER_START, sc->pbuf, 4);
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nm_wr(sc, NM_PBUFFER_END, sc->pbuf + NM_BUFFSIZE - ssz, 4);
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nm_wr(sc, NM_PBUFFER_CURRP, sc->pbuf, 4);
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nm_wr(sc, NM_PBUFFER_WMARK, sc->pbuf + NM_BUFFSIZE / 2, 4);
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nm_wr(sc, NM_PLAYBACK_ENABLE_REG, NM_PLAYBACK_FREERUN |
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NM_PLAYBACK_ENABLE_FLAG, 1);
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nm_wr(sc, NM_AUDIO_MUTE_REG, 0, 2);
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} else {
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nm_wr(sc, NM_PLAYBACK_ENABLE_REG, 0, 1);
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nm_wr(sc, NM_AUDIO_MUTE_REG, NM_AUDIO_MUTE_BOTH, 2);
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}
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} else {
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if (go == PCMTRIG_START) {
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nm_wr(sc, NM_RECORD_ENABLE_REG, NM_RECORD_FREERUN |
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NM_RECORD_ENABLE_FLAG, 1);
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nm_wr(sc, NM_RBUFFER_START, sc->rbuf, 4);
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nm_wr(sc, NM_RBUFFER_END, sc->rbuf + NM_BUFFSIZE, 4);
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nm_wr(sc, NM_RBUFFER_CURRP, sc->rbuf, 4);
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nm_wr(sc, NM_RBUFFER_WMARK, sc->rbuf + NM_BUFFSIZE / 2, 4);
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} else {
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nm_wr(sc, NM_RECORD_ENABLE_REG, 0, 1);
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}
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}
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return 0;
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}
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static int
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nmchan_getptr(void *data)
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{
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struct sc_chinfo *ch = data;
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struct sc_info *sc = ch->parent;
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if (ch->dir == PCMDIR_PLAY)
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return nm_rd(sc, NM_PBUFFER_CURRP, 4) - sc->pbuf;
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else
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return nm_rd(sc, NM_RBUFFER_CURRP, 4) - sc->rbuf;
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}
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static pcmchan_caps *
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nmchan_getcaps(void *data)
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{
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return &nm_caps;
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}
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/* The interrupt handler */
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static void
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nm_intr(void *p)
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{
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struct sc_info *sc = (struct sc_info *)p;
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int status, x;
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status = nm_rd(sc, NM_INT_REG, sc->irsz);
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if (status == 0) {
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if (sc->badintr++ > 1000) {
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device_printf(sc->dev, "1000 bad intrs\n");
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sc->badintr = 0;
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}
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return;
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}
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sc->badintr = 0;
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if (status & sc->playint) {
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status &= ~sc->playint;
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nm_ackint(sc, sc->playint);
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chn_intr(sc->pch.channel);
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}
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if (status & sc->recint) {
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status &= ~sc->recint;
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nm_ackint(sc, sc->recint);
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chn_intr(sc->rch.channel);
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}
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if (status & sc->misc1int) {
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status &= ~sc->misc1int;
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nm_ackint(sc, sc->misc1int);
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x = nm_rd(sc, 0x400, 1);
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nm_wr(sc, 0x400, x | 2, 1);
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device_printf(sc->dev, "misc int 1\n");
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}
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if (status & sc->misc2int) {
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status &= ~sc->misc2int;
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nm_ackint(sc, sc->misc2int);
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x = nm_rd(sc, 0x400, 1);
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nm_wr(sc, 0x400, x & ~2, 1);
|
||||
device_printf(sc->dev, "misc int 2\n");
|
||||
}
|
||||
if (status) {
|
||||
status &= ~sc->misc2int;
|
||||
nm_ackint(sc, sc->misc2int);
|
||||
device_printf(sc->dev, "unknown int\n");
|
||||
}
|
||||
}
|
||||
|
||||
/* -------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* Probe and attach the card
|
||||
*/
|
||||
|
||||
static int
|
||||
nm_init(struct sc_info *sc)
|
||||
{
|
||||
u_int32_t ofs, i;
|
||||
|
||||
if (sc->type == NM256AV_PCI_ID) {
|
||||
sc->ac97_base = NM_MIXER_OFFSET;
|
||||
sc->ac97_status = NM_MIXER_STATUS_OFFSET;
|
||||
sc->ac97_busy = NM_MIXER_READY_MASK;
|
||||
|
||||
sc->buftop = 2560 * 1024;
|
||||
|
||||
sc->irsz = 2;
|
||||
sc->playint = NM_PLAYBACK_INT;
|
||||
sc->recint = NM_RECORD_INT;
|
||||
sc->misc1int = NM_MISC_INT_1;
|
||||
sc->misc2int = NM_MISC_INT_2;
|
||||
} else if (sc->type == NM256ZX_PCI_ID) {
|
||||
sc->ac97_base = NM_MIXER_OFFSET;
|
||||
sc->ac97_status = NM2_MIXER_STATUS_OFFSET;
|
||||
sc->ac97_busy = NM2_MIXER_READY_MASK;
|
||||
|
||||
sc->buftop = (nm_rd(sc, 0xa0b, 2)? 6144 : 4096) * 1024;
|
||||
|
||||
sc->irsz = 4;
|
||||
sc->playint = NM2_PLAYBACK_INT;
|
||||
sc->recint = NM2_RECORD_INT;
|
||||
sc->misc1int = NM2_MISC_INT_1;
|
||||
sc->misc2int = NM2_MISC_INT_2;
|
||||
}
|
||||
sc->badintr = 0;
|
||||
ofs = sc->buftop - 0x0400;
|
||||
sc->buftop -= 0x1400;
|
||||
|
||||
if ((nm_rdbuf(sc, ofs, 4) & NM_SIG_MASK) == NM_SIGNATURE) {
|
||||
i = nm_rdbuf(sc, ofs + 4, 4);
|
||||
if (i != 0 && i != 0xffffffff)
|
||||
sc->buftop = i;
|
||||
}
|
||||
|
||||
sc->cbuf = sc->buftop - NM_MAX_COEFFICIENT;
|
||||
sc->rbuf = sc->cbuf - NM_BUFFSIZE;
|
||||
sc->pbuf = sc->rbuf - NM_BUFFSIZE;
|
||||
sc->acbuf = sc->pbuf - (NM_TOTAL_COEFF_COUNT * 4);
|
||||
|
||||
nm_wr(sc, 0, 0x11, 1);
|
||||
nm_wr(sc, NM_RECORD_ENABLE_REG, 0, 1);
|
||||
nm_wr(sc, 0x214, 0, 2);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
nm_pci_probe(device_t dev)
|
||||
{
|
||||
char *s = NULL;
|
||||
|
||||
switch (pci_get_devid(dev)) {
|
||||
case NM256AV_PCI_ID:
|
||||
s = "NeoMagic 256AV";
|
||||
break;
|
||||
|
||||
case NM256ZX_PCI_ID:
|
||||
s = "NeoMagic 256ZX";
|
||||
break;
|
||||
}
|
||||
|
||||
if (s) device_set_desc(dev, s);
|
||||
return s? 0 : ENXIO;
|
||||
}
|
||||
|
||||
static int
|
||||
nm_pci_attach(device_t dev)
|
||||
{
|
||||
snddev_info *d;
|
||||
u_int32_t data;
|
||||
struct sc_info *sc;
|
||||
struct ac97_info *codec;
|
||||
char status[SND_STATUSLEN];
|
||||
|
||||
d = device_get_softc(dev);
|
||||
if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT)) == NULL) {
|
||||
device_printf(dev, "cannot allocate softc\n");
|
||||
return ENXIO;
|
||||
}
|
||||
|
||||
bzero(sc, sizeof(*sc));
|
||||
sc->dev = dev;
|
||||
sc->type = pci_get_devid(dev);
|
||||
|
||||
data = pci_read_config(dev, PCIR_COMMAND, 2);
|
||||
data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
|
||||
pci_write_config(dev, PCIR_COMMAND, data, 2);
|
||||
data = pci_read_config(dev, PCIR_COMMAND, 2);
|
||||
|
||||
sc->bufid = PCIR_MAPS;
|
||||
sc->buf = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->bufid,
|
||||
0, ~0, 1, RF_ACTIVE);
|
||||
sc->regid = PCIR_MAPS + 4;
|
||||
sc->reg = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->regid,
|
||||
0, ~0, 1, RF_ACTIVE);
|
||||
|
||||
if (!sc->buf || !sc->reg) {
|
||||
device_printf(dev, "unable to map register space\n");
|
||||
goto bad;
|
||||
}
|
||||
|
||||
if (nm_init(sc) == -1) {
|
||||
device_printf(dev, "unable to initialize the card\n");
|
||||
goto bad;
|
||||
}
|
||||
|
||||
codec = ac97_create(sc, nm_rdcd, nm_wrcd);
|
||||
if (codec == NULL) goto bad;
|
||||
mixer_init(d, &ac97_mixer, codec);
|
||||
|
||||
sc->irqid = 0;
|
||||
sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irqid,
|
||||
0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
|
||||
if (!sc->irq ||
|
||||
bus_setup_intr(dev, sc->irq, INTR_TYPE_TTY, nm_intr, sc, &sc->ih)) {
|
||||
device_printf(dev, "unable to map interrupt\n");
|
||||
goto bad;
|
||||
}
|
||||
|
||||
snprintf(status, SND_STATUSLEN, "at memory 0x%lx, 0x%lx irq %ld",
|
||||
rman_get_start(sc->buf), rman_get_start(sc->reg),
|
||||
rman_get_start(sc->irq));
|
||||
|
||||
if (pcm_register(dev, sc, 1, 1)) goto bad;
|
||||
pcm_addchan(dev, PCMDIR_REC, &nm_chantemplate, sc);
|
||||
pcm_addchan(dev, PCMDIR_PLAY, &nm_chantemplate, sc);
|
||||
pcm_setstatus(dev, status);
|
||||
|
||||
return 0;
|
||||
|
||||
bad:
|
||||
if (sc->buf) bus_release_resource(dev, SYS_RES_MEMORY, sc->bufid, sc->buf);
|
||||
if (sc->reg) bus_release_resource(dev, SYS_RES_MEMORY, sc->regid, sc->reg);
|
||||
if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih);
|
||||
if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq);
|
||||
free(sc, M_DEVBUF);
|
||||
return ENXIO;
|
||||
}
|
||||
|
||||
static device_method_t nm_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, nm_pci_probe),
|
||||
DEVMETHOD(device_attach, nm_pci_attach),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t nm_driver = {
|
||||
"pcm",
|
||||
nm_methods,
|
||||
sizeof(snddev_info),
|
||||
};
|
||||
|
||||
static devclass_t pcm_devclass;
|
||||
|
||||
DRIVER_MODULE(nm, pci, nm_driver, pcm_devclass, 0, 0);
|
||||
114
sys/dev/sound/pci/neomagic.h
Normal file
114
sys/dev/sound/pci/neomagic.h
Normal file
|
|
@ -0,0 +1,114 @@
|
|||
/*
|
||||
* Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Derived from the public domain Linux driver
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _NM256_H_
|
||||
#define _NM256_H_
|
||||
|
||||
/* The BIOS signature. */
|
||||
#define NM_SIGNATURE 0x4e4d0000
|
||||
/* Signature mask. */
|
||||
#define NM_SIG_MASK 0xffff0000
|
||||
|
||||
/* Size of the second memory area. */
|
||||
#define NM_PORT2_SIZE 4096
|
||||
|
||||
/* The base offset of the mixer in the second memory area. */
|
||||
#define NM_MIXER_OFFSET 0x600
|
||||
|
||||
/* The maximum size of a coefficient entry. */
|
||||
#define NM_MAX_COEFFICIENT 0x5000
|
||||
|
||||
/* The interrupt register. */
|
||||
#define NM_INT_REG 0xa04
|
||||
/* And its bits. */
|
||||
#define NM_PLAYBACK_INT 0x40
|
||||
#define NM_RECORD_INT 0x100
|
||||
#define NM_MISC_INT_1 0x4000
|
||||
#define NM_MISC_INT_2 0x1
|
||||
|
||||
/* The AV's "mixer ready" status bit and location. */
|
||||
#define NM_MIXER_STATUS_OFFSET 0xa04
|
||||
#define NM_MIXER_READY_MASK 0x0800
|
||||
|
||||
/*
|
||||
* For the ZX. It uses the same interrupt register, but it holds 32
|
||||
* bits instead of 16.
|
||||
*/
|
||||
#define NM2_PLAYBACK_INT 0x10000
|
||||
#define NM2_RECORD_INT 0x80000
|
||||
#define NM2_MISC_INT_1 0x8
|
||||
#define NM2_MISC_INT_2 0x2
|
||||
|
||||
/* The ZX's "mixer ready" status bit and location. */
|
||||
#define NM2_MIXER_STATUS_OFFSET 0xa06
|
||||
#define NM2_MIXER_READY_MASK 0x0800
|
||||
|
||||
/* The playback registers start from here. */
|
||||
#define NM_PLAYBACK_REG_OFFSET 0x0
|
||||
/* The record registers start from here. */
|
||||
#define NM_RECORD_REG_OFFSET 0x200
|
||||
|
||||
/* The rate register is located 2 bytes from the start of the register area. */
|
||||
#define NM_RATE_REG_OFFSET 2
|
||||
|
||||
/* Mono/stereo flag, number of bits on playback, and rate mask. */
|
||||
#define NM_RATE_STEREO 1
|
||||
#define NM_RATE_BITS_16 2
|
||||
#define NM_RATE_MASK 0xf0
|
||||
|
||||
/* Playback enable register. */
|
||||
#define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
|
||||
#define NM_PLAYBACK_ENABLE_FLAG 1
|
||||
#define NM_PLAYBACK_ONESHOT 2
|
||||
#define NM_PLAYBACK_FREERUN 4
|
||||
|
||||
/* Mutes the audio output. */
|
||||
#define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
|
||||
#define NM_AUDIO_MUTE_LEFT 0x8000
|
||||
#define NM_AUDIO_MUTE_RIGHT 0x0080
|
||||
#define NM_AUDIO_MUTE_BOTH 0x8080
|
||||
|
||||
/* Recording enable register. */
|
||||
#define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
|
||||
#define NM_RECORD_ENABLE_FLAG 1
|
||||
#define NM_RECORD_FREERUN 2
|
||||
|
||||
#define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
|
||||
#define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
|
||||
#define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
|
||||
#define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
|
||||
|
||||
#define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
|
||||
#define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
|
||||
#define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
|
||||
#define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
|
||||
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue