Commit graph

13 commits

Author SHA1 Message Date
Sepherosa Ziehau
e6aeff0c0a etherswitch: Unbreak LINT build
Sponsored by:	Microsoft
2016-08-08 05:57:04 +00:00
Adrian Chadd
1b334c8bc1 [arswitch] extend the debug support to be configurable at runtime.
* remove the DEBUG ifdef; defining it is too far reaching throughout
  the whole system;
* add a bitmask in the softc for controlling debugging;
* .. enable said debugging as a sysctl;
* add bitmaps for register access, reset and vlans.

TODO:

* Now that the debug statements are configurable, we definitely could
  do with more debugging
* Move the debugging into the top-level etherswitch driver and have
  sub-drivers obey.
2016-08-07 01:32:37 +00:00
Adrian Chadd
71e8eac4fd [mdio] migrate mdiobus out of etherswitch and into a top-level device of its own.
The mdio driver interface is generally useful for devices that require
MDIO without the full MII bus interface. This lifts the driver/interface
out of etherswitch(4), and adds a mdio(4) man page.

Submitted by:	Landon Fuller <landon@landonf.org>
Differential Revision:	https://reviews.freebsd.org/D4606
2015-12-26 02:31:39 +00:00
Adrian Chadd
78549b94cd Fix up support for the AR8327.
* Even though I got the registers around "right", it seems
  I'm not tickling the MDIO access correctly for the internal PHY
  bus.  Some of the switches are fine poking at the external PHY
  registers; others aren't.  So, enable direct PHY bus access
  for the AR8327, and leave the existing code in place for the
  others.

* Go and shuffle the register access around.  Whilst here,
  restore the 2ms delay if changing page.

* Comment out some of the stub printf()s; there's some upcoming
  work to add port VLAN support.

Tested:

* AP135 development board
* Carambola2 - AR9331 SoC
2015-03-08 03:53:36 +00:00
Rui Paulo
efce3748f3 Revert r268543.
We should probably fix sys/gpio.h instead.
2014-07-12 06:23:42 +00:00
Rui Paulo
bd08cbb81a Move iic.h to sys/ so that it's automatically installed in /usr/include/sys.
This lets us call iic(4) ioctls without needing the kernel source code
and follows the same model of GPIO.

MFC after:	3 weeks
2014-07-12 01:04:10 +00:00
Adrian Chadd
26ca36d4ca Add in a flag to control whether the low or high data word of a register access
is latched in first.

The AR8327 apparently requires the low data word be latched in first.

Obtained from:	Linux OpenWRT
2014-02-19 04:23:01 +00:00
Adrian Chadd
7e1a619d03 Implement PHY bus MMD writes for arswitch.
This is used by the AR8327 PHY setup path.

Obtained from:	OpenWRT
2014-02-17 02:24:58 +00:00
Luiz Otavio O Souza
b9f07b864b Add the support for 802.1q and port based vlans for arswitch.
Tested on: RB450G (standalone ar8316), RSPRO (standalone ar8316) and
TPLink MR-3220 (ar724x integrated switch).

Approved by:	adrian (mentor)
Obtained from:	zrouter
2013-07-23 14:24:22 +00:00
Luiz Otavio O Souza
9604b6ac4a Fix the arswitch instability problem. It turns out that the
arswitch_writereg() routine was writing the registers in the wrong order.

Revert -r241918 as the root problem is now fixed. Remove another workaround
from arswitch_ar7240.c.

Simplify and fix the code on arswitch_writephy() by using
arswitch_writereg().

While here remove a redundant declaration from arswitchvar.h.

Approved by:	adrian (mentor)
2013-07-23 14:02:38 +00:00
Adrian Chadd
68629cc4f1 Don't try to cache the page setting - always set the page before
doing a switch register read/write.

PR:		kern/172968
2012-10-22 22:32:52 +00:00
Aleksandr Rybalko
26aff2abad Mask data to only 16 bits to be sure on write into switch reg.
Submitted by:	Luiz Otavio O Souza
Approved by:	adrian (mentor)
2012-10-15 12:28:14 +00:00
Adrian Chadd
a043e8c76b Commit the first pass of the etherswitch support.
This is designed to support the very basic ethernet switch chip behaviour,
specifically:

* accessing switch register space;
* accessing per-PHY registers (for switches that actually expose PHYs);
* basic vlan group support, which applies for the rtl8366 driver but not
  for the atheros switches.

This also includes initial support for:

* rtl8366rb support - which is a 10/100/1000 switch which supports
  vlan groups;
* Initial Atheros AR8316 switch support - which is a 10/100/1000 switch
  which supports an alternate vlan configuration (so the vlan group
  methods are stubbed.)

The general idea here is that the switch driver may speak to a variety of
backend busses (mdio, i2c, spi, whatever) and expose:

* If applicable, one or more MDIO busses which ethernet interfaces can
  then attach PHYs to via miiproxy/mdioproxy;

* exposes miibusses, one for each port at the moment, so ..

* .. a PHY can be exposed on each miibus, for each switch port, with all
  of the existing MII/ifnet framework.

However:

* The ifnet is manually created for now, and it isn't linked into the
  interface list, nor can you (currently) send/receive frames on this ifnet.
  At some point in the future there may be _some_ support for this, for
  switches with a multi-port, isolated mode.

* I'm still in the process of sorting out correct(er) locking.

TODO:

* ray's switch code in zrouter (zrouter.org) includes a much more developed
  newbus API that covers the various switch methods, as well as a
  capability API so drivers, the switch layer and the userland utility
  can properly control the subset of supported features.

  The plan is to sort that out later, once the rest of ray's switch drivers
  are brought over and extended to export MII busses and PHYs.

Submitted by:	Stefan Bethke <stb@lassitu.de>
Reviewed by:	ray
2012-05-11 20:53:20 +00:00