Commit graph

76 commits

Author SHA1 Message Date
Warner Losh
4d846d260e spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD
The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with:		pfg
MFC After:		3 days
Sponsored by:		Netflix
2023-05-12 10:44:03 -06:00
Wei Hu
8ea7fa16d9 uart: Don't change settings or throttle putc for Hyper-V
Azure setup does not like it when FreeBSD overrides the settings of the
UART device. When Hyper-V is detected, don't do this and also don't
throttle putc() output. This is a workaround for the early boot hang
of FreeBSD on Azure.

Tested on Azure, ESXi (VM with serial port), and SG-8200

PR:		264267
Reviewed by:	kevans, whu
Tested by:	whu
Obtained from:	Rubicon Communications, LLC (Netgate)
MFC after:	2 weeks
Sponsored by:	Rubicon Communications, LLC (Netgate)
2023-03-18 07:07:54 +00:00
Colin Percival
5ad8c32c72 ns8250: Fix sense of LSR_TEMT FCR check
When flushing the UART, we need to drain manually if LSR_TEMT is
*not* asserted, aka. if the transmit FIFO is not empty.

Reported by:	void <void@f-m.fm>
Fixes:		c4b68e7e53 "ns8250: Check if flush via FCR succeeded"
Differential Revision:	https://reviews.freebsd.org/D37185
2022-10-28 12:20:28 -07:00
Colin Percival
c4b68e7e53 ns8250: Check if flush via FCR succeeded
The emulated UART in the Firecracker VMM (aka the implementation in the
rust-vmm/vm-superio project) includes FIFOs but does not implement the
FCR register, which is used by ns8250_flush to flush the FIFOs.

Check the LSR to see if there is still data in the FIFOs and call
ns8250_drain if necessary.

Discussed with:	emaste, imp, jrtc27
Sponsored by:	https://patreon.com/cperciva
Differential Revision:	https://reviews.freebsd.org/D36979
2022-10-17 23:02:21 -07:00
Colin Percival
39d6144dcd ns8250_drain: Drain without DELAY first
In virtual machines with virtual UARTs which have fictitious baud
rates, it may be possible to drain the receive queue very quickly,
without needing to DELAY after each character.  Attempt to read
(and discard) the receive queue as fast as possible, stopping for
a DELAY only when LSR_RXRDY is no longer asserted; assume that we
have finished draining the queue when LSR_RXRDY is asserted both
before and after a DELAY.

This speeds up the boot process in FreeBSD/Firecracker by 27 ms.

Reviewed by:	imp, jrtc27
Sponsored by:	https://www.patreon.com/cperciva
Differential Revision:	https://reviews.freebsd.org/D36184
2022-10-07 17:51:54 -07:00
Mateusz Kozyra
7cb73f654f uart: Add ACPI entry for LS1046A UART
NXP defines unique name for LS1046A UART - "NXP0018".
It is ns8250 compatible, adding a new uart compat data entry is enough
to make it work.
Tested on LS1046ARDB.

Approved by:	mw(mentor)
Reviewed by:	mw, kd
Obtained from:	Semihalf
Differential Revision:	https://reviews.freebsd.org/D36260
2022-08-22 09:16:08 +02:00
Mark Johnston
4a9a41650c uart: Fix an out-of-bounds read in ns8250_bus_probe()
The problem is that ns8250_bus_probe() accesses a field from the
ns8250_softc, which embeds the generic UART softc, but the ns8250_softc
hasn't yet been allocated because we're still probing.

This is a regression from commit 0aefb0a63c.  This fixed a problem
where one of the upper four IER bits, which are usually reserved, needs
to be set in order to get RX interrupts before the RX FIFO is full.  At
the same time, we avoid clearing those reserved bits (see commit
58957d8717, though other UART drivers I looked at do not bother with
this).

So, copy what ns8250_init() does to disable interrupts, since we don't
know what the "right" mask is at this point.

Reported by:	syzbot+f256beefd0df9eb796e7@syzkaller.appspotmail.com
Reviewed by:	imp
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D31124
2021-07-13 17:49:39 -04:00
Marcin Wojtas
9cf66a0458 uart_dev_ns8250: Switch ACPI UART subtype for Marvell SoCs
DBG2 ACPI table description [1] specifies three subtypes
related to 16550 UART:
0x0 - 16550 compatible
0x1 - 16550 subset
0x12 - 16550 compatible with parameters defined in Generic Address Structure (GAS)

It turned out however, that the Windows OS treats 0x0 subtype as
legacy x86 UART with 8-bit access. ARM SoCs can use types 0x1 (16550 with
fixed mmio32 access) or 0x12 (16550 with fully respected GAS contents).

Switch Marvell SoCs ACPI UART subtype to 0x1 - thanks to that the same firmware
can run properly with UART output in FreeBSD, Windows 10, Linux and ESXI
hypervisor. Tests showed the older firmware versions that use 0x0
UART subtype in SPCR table continue to display output properly.

[1] https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table

Obtained from: Semihalf
Sponsored by: ARM
Differential revision: https://reviews.freebsd.org/D30386
MFC after: 2 weeks
2021-06-02 09:55:19 +02:00
Mitchell Horne
7e7f7beee7 ns8250: don't drop IER_TXRDY on bus_grab/ungrab
It has been observed that some systems are often unable to resume from
ddb after entering with debug.kdb.enter=1. Checking the status further
shows the terminal is blocked waiting in tty_drain(), but it never makes
progress in clearing the output queue, because sc->sc_txbusy is high.

I noticed that when entering polling mode for the debugger, IER_TXRDY is
set in the failure case. Since this bit is never tracked by the softc,
it will not be restored by ns8250_bus_ungrab(). This creates a race in
which a TX interrupt can be lost, creating the hang described above.
Ensuring that this bit is restored is enough to prevent this, and resume
from ddb as expected.

The solution is to track this bit in the sc->ier field, for the same
lifetime that TX interrupts are enabled.

PR:		223917, 240122
Reviewed by:	imp, manu
Tested by:	bz
MFC after:	5 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D29130
2021-03-10 11:04:42 -04:00
Mateusz Guzik
bf10325475 uart: clean up empty lines in .c and .h files 2020-09-01 21:50:00 +00:00
John Baldwin
b47c1eda0c Correct baud rate error calculation.
Shifting right by 1 is not the same as dividing by 2 for signed
values.  In particular, dividing a signed value by 2 gives the integer
ceiling of the (e.g. -5 / 2 == -2) whereas shifting right by 1 always
gives the floor (-5 >> 1 == -3).

An embedded board with a 25 Mhz base clock results in an error of
-30.5% when used with a baud rate of 115200.  Using division, this
truncates to -30% and is permitted.  Using the shift, this fails and
is rejected causing TIOCSETA requests to fail with EINVAL and breaking
getty(8).

Using division gives the same error range for both over and under baud
rates and also makes the code match the behavior documented in the
existing comment about supporting boards with 25 Mhz clocks.

Reported by:	imp
MFC after:	2 weeks
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D24367
2020-04-13 20:43:57 +00:00
Alexander Motin
3a97344265 Relax TX draining in ns8250_bus_transmit().
Since TX interrupt is generated when THRE is set, wait for TEMT set means
wait for full character transmission time.  At low speeds that may take
awhile, burning CPU time while holding sc_hwmtx lock, also congested.

This is partial revert of r317659.

PR:		240121
MFC after:	2 weeks
2019-09-15 23:56:39 +00:00
Rebecca Cran
a852cb9596 Add ACPI entries for Synopsys Designware UARTs used on ARM platforms
This fixes (userspace) console on the Marvell MACCHIATObin in ACPI mode with
latest TianoCore EDK2 firmware.

Submitted by:	Greg V <greg@unrelenting.technology>
Reviewed by:	mw, bcran
Differential Revision:	https://reviews.freebsd.org/D20765
2019-06-28 01:19:08 +00:00
Matt Macy
381388b9c4 add snps IP uart support / genaralize UART
This is an amalgam of a patch by Doug Ambrisko to
generalize uart_acpi_find_device, imp moving the
ACPI table to uart_dev_ns8250.c and advice by jhb
to work around a bug in the EPYC 3151 BIOS
(the BIOS incorrectly marks the serial ports as
disabled)

Reviewed by: imp
MFC after: 8 weeks
Differential Revision: https://reviews.freebsd.org/D16432
2018-08-19 21:10:21 +00:00
Matt Macy
f30f0f2b47 Add busy detect quirk to list of console options
This change allows one to set the busy_detect flag
required by the synopsys UART at the loader prompt.
This is needed by the EPYC 3000 SoC.

This will give users a working console up to the point where getty is required:
hw.uart.console="mm:0xfedc9000,rs:2,bd:1"

Reviewed by:	imp
MFC after:	4 weeks
Differential Revision:	https://reviews.freebsd.org/D16399
2018-07-22 23:32:21 +00:00
Pedro F. Giffuni
718cf2ccb9 sys/dev: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-27 14:52:40 +00:00
Ed Maste
6e71b3c3ed uart: detect 256-byte FIFOs
Submitted by:	Zakary Nafziger <worldofzak@gmail.com>
Sponsored by:	The FreeBSD Foundation
2017-10-10 20:08:30 +00:00
Alexander Motin
4e352a4583 Make some UART consoles to not spin wait for data to be sent.
At least with Tx FIFO enabled it shows me ~10% reduction of verbose boot
time with serial console at 115200 baud.

Reviewed by:	marcel
MFC after:	2 weeks
2017-05-01 19:47:10 +00:00
Ruslan Bukin
b192bae67e Add support for UART found in the Ingenic XBurst system on chips.
These CPUs has non-standard UART enable bit hidden in the UART FIFO
Control Register.

Sponsored by:	DARPA, AFRL
2016-11-17 14:41:22 +00:00
Pedro F. Giffuni
453130d9bf sys/dev: minor spelling fixes.
Most affect comments, very few have user-visible effects.
2016-05-03 03:41:25 +00:00
Jared McNeill
b738dafd90 Move support for Synopsys Designware APB UART out of ns8250 and into a
separate driver. Add support for activating clock and hwreset resources
for these devices when the EXT_RESOURCES option is present.

Reviewed by:		andrew, mmel, Emmanuel Vadot <manu@bidouilliste.com>
Approved by:		adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D5749
2016-04-01 20:26:45 +00:00
Wojciech Macek
3b654e081a Add ns16550a compatible string in UART 8250 driver
Obtained from:         Semihalf
Submitted by:          Michal Stanek <mst@semihalf.com>
Sponsored by:          Annapurna Labs
Approved by:           cognet (mentor)
Reviewed by:           imp, wma
Differential revision: https://reviews.freebsd.org/D5404
2016-02-26 08:43:36 +00:00
Michal Meloun
3c7b90774d UART: Fix spurious interrupts generated by ns8250 and lpc drivers:
- don't enable transmitter empty interrupt before filling TX FIFO.
 - add missing uart_barrier() call in interrupt service routine
2016-02-12 05:14:58 +00:00
Zbigniew Bodek
8abfc69d11 Fix busy-detect when using DesignWare UART
uart_dev_ns8250 now relies on compatible property instead of additional
'busy-detect' cell. All drivers with compatible = "snps,dw-apb-uart" have
busy detection turned on. DTS files of devices affected by the change
were modified and 'busy-detect' property was removed.

Reviewed by:    andrew, ian, imp
Obtained from:  Semihalf
Sponsored by:   Stormshield
Submitted by:   Bartosz Szczepanek <bsz@semihalf.com>
Differential revision:  https://reviews.freebsd.org/D4218
2016-01-20 13:51:14 +00:00
Zbigniew Bodek
a6c981778c Add compatibility string for dw-apb-uart in ns8250 driver
This compatibility string is used in .dts file of Armada38x
and isrequired for driver attachment.

Reviewed by:    andrew, ian, imp
Obtained from:  Semihalf
Sponsored by:   Stormshield
Submitted by:   Michal Stanek <mst@semihalf.com>
Differential revision:  https://reviews.freebsd.org/D4216
2016-01-20 13:47:44 +00:00
Ian Lepore
fdfbb3f5b1 Restore uart PPS signal capture polarity to its historical norm, and add an
option to invert the polarity in software. Also add an option to capture
very narrow pulses by using the hardware's MSR delta-bit capability of
latching line state changes.

This effectively reverts the mistake I made in r286595 which was based on
empirical measurements made on hardware using TTL-level signaling, in which
the logic levels are inverted from RS-232. Thus, this re-syncs the polarity
with the requirements of RFC 2783, which is writen in terms of RS-232
signaling.

Narrow-pulse mode uses the ability of most ns8250 and similar chips to
provide a delta indication in the modem status register. The hardware is
able to notice and latch the change when the pulse width is shorter than
interrupt latency, which results in the signal no longer being asserted by
time the interrupt service code runs. When running in this mode we get
notified only that "a pulse happened" so the driver synthesizes both an
ASSERT and a CLEAR event (with the same timestamp for each). When the pulse
width is about equal to the interrupt latency the driver may intermittantly
see both edges of the pulse. To prevent generating spurious events, the
driver implements a half-second lockout period after generating an event
before it will generate another.

Differential Revision:	https://reviews.freebsd.org/D4477
2016-01-12 18:42:00 +00:00
Adrian Chadd
e0fe7c958f uart(4) - make the 8250 uart baudrate tolerance build time tweakable.
It turns out on a 16550 w/ a 25MHz SoC reference clock you get a little
over 3% error at 115200 baud, which causes this to fail.

Just .. cope. Things cope these days.

Default to 30 (3.0%) as before, but allow UART_DEV_TOLERANCE_PCT to be
set at build time to change that.
2015-11-18 06:24:21 +00:00
Luiz Otavio O Souza
b1621f22b3 Actually check the DTS node value to enable the uart quirks.
Without this fix, you cannot disable the quirks by setting it to 0, just
the presence of the FDT node was enough to enable it.
2015-05-30 16:30:51 +00:00
Andrew Turner
405ada37fb Add support for the uart classes to set their default register shift value.
This is needed with the pl011 driver. Before this change it would default
to a shift of 0, however the hardware places the registers at 4-byte
addresses meaning the value should be 2.

This patch fixes this for the pl011 when configured using the fdt. The
other drivers have a default value of 0 to keep this a no-op.

MFC after:	1 week
2015-04-11 17:16:23 +00:00
Ian Lepore
3bb693af87 Move the uart_class definitions and fdt compat data into the individual
uart implementations, and export them using the new linker-set mechanism.

Differential Revision:	https://reviews.freebsd.org/D1993
Submitted by:	Michal Meloun
2015-03-07 15:24:15 +00:00
Hans Petter Selasky
af3b2549c4 Pull in r267961 and r267973 again. Fix for issues reported will follow. 2014-06-28 03:56:17 +00:00
Glen Barber
37a107a407 Revert r267961, r267973:
These changes prevent sysctl(8) from returning proper output,
such as:

 1) no output from sysctl(8)
 2) erroneously returning ENOMEM with tools like truss(1)
    or uname(1)
 truss: can not get etype: Cannot allocate memory
2014-06-27 22:05:21 +00:00
Hans Petter Selasky
3da1cf1e88 Extend the meaning of the CTLFLAG_TUN flag to automatically check if
there is an environment variable which shall initialize the SYSCTL
during early boot. This works for all SYSCTL types both statically and
dynamically created ones, except for the SYSCTL NODE type and SYSCTLs
which belong to VNETs. A new flag, CTLFLAG_NOFETCH, has been added to
be used in the case a tunable sysctl has a custom initialisation
function allowing the sysctl to still be marked as a tunable. The
kernel SYSCTL API is mostly the same, with a few exceptions for some
special operations like iterating childrens of a static/extern SYSCTL
node. This operation should probably be made into a factored out
common macro, hence some device drivers use this. The reason for
changing the SYSCTL API was the need for a SYSCTL parent OID pointer
and not only the SYSCTL parent OID list pointer in order to quickly
generate the sysctl path. The motivation behind this patch is to avoid
parameter loading cludges inside the OFED driver subsystem. Instead of
adding special code to the OFED driver subsystem to post-load tunables
into dynamically created sysctls, we generalize this in the kernel.

Other changes:
- Corrected a possibly incorrect sysctl name from "hw.cbb.intr_mask"
to "hw.pcic.intr_mask".
- Removed redundant TUNABLE statements throughout the kernel.
- Some minor code rewrites in connection to removing not needed
TUNABLE statements.
- Added a missing SYSCTL_DECL().
- Wrapped two very long lines.
- Avoid malloc()/free() inside sysctl string handling, in case it is
called to initialize a sysctl from a tunable, hence malloc()/free() is
not ready when sysctls from the sysctl dataset are registered.
- Bumped FreeBSD version to indicate SYSCTL API change.

MFC after:	2 weeks
Sponsored by:	Mellanox Technologies
2014-06-27 16:33:43 +00:00
Olivier Houchard
8bc9a079ef In uart_bus_grab(), use the ier_mask instead of a custom hack for XScale.
Suggested by:	jmg
2014-05-29 21:00:06 +00:00
Olivier Houchard
caf6d6b491 In the grab function, keep the bit 6 on in the IER, on XScale, using 0
turns the UART off, which is unfortunate if one want to use it as a console.
2014-05-29 19:57:51 +00:00
Warner Losh
d76a1ef4e1 Introduce grab and ungrab upcalls. When the kernel desires to grab the
console, it calls the grab functions. These functions should turn off
the RX interrupts, and any others that interfere. This makes mountroot
prompt work again. If there's more generalized need other than
prompting, many of these routines should be expanded to do those new
things.

Should have been part of r260889, but waasn't due to command line typo.

Reviewed by:	bde (with reservations)
2014-01-19 19:39:13 +00:00
Zbigniew Bodek
49e368ac48 Wait for DesignWare UART transfers completion before accessing line control
When using DW UART with BUSY detection it is necessary to wait
until all serial transfers are finished before manipulating the
line control. LCR will not be affected when UART is busy.
In addition, if Divisor Latch Access Bit is being set in order to
modify UART divisors:
1. We will get BUSY interrupt if interrupts are enabled.
2. Because LCR will not be affected the THR and (even worse) IER
   contents will be corrupted. This will lead to console hang.

Approved by:	cognet (mentor)
2013-10-26 17:24:59 +00:00
Marcel Moolenaar
40a827b6f0 A final test with unmodified code has shown that a delay of 150ms
is not giving us a 100% success rate. Bump the delay to 200ms as
that seems to do the trick.

Note that during testing the delay was added to uart_bus_attach()
in uart_core.c. While having the delay in a different place can
change the behaviour, it was not expected. Having to bump the
delay with another 50ms could therefore be an indication that
the problem can not be solved with delays.

Reported by: kevlo@
Tested by: kevlo@
2013-08-30 15:26:45 +00:00
Marcel Moolenaar
4fc4997535 Work-around a timing problem with the ITE IT8513E now that the core
calls ns8250_bus_ipend() almost immediately after ns8250_bus_attach().
As it appears, a line break condition is being signalled for almost
all received characters due to this. A delay of 150ms seems enough
to allow the H/W to settle and to avoid the problem.
More analysis is needed, but for now a regression has been addressed.

Reported by: kevlo@
Tested by: kevlo@
2013-08-29 16:26:04 +00:00
Ian Lepore
167cb33f85 Make the uart ns8250 high-level interface public rather than static.
This makes it easier to implement new drivers which are "mostly ns8250"
but with some small difference such as needing to enable clocks or poke
a non-standard register at probe or attach time.
2013-08-21 14:26:15 +00:00
Ganbold Tsagaankhuu
ac4adddf04 Add support for A10 uart.
A10 uart is derived from Synopsys DesignWare uart and requires
to read Uart Status Register when IIR_BUSY has detected.
Also this change includes FDT check, where it checks device
specific properties defined in dts and sets the busy_detect variable.
broken_txfifo is also needed to be set in order to make it work for
A10 uart case.

Reviewed by: marcel@
Approved by: gonzo@
2013-03-01 01:42:31 +00:00
Colin Percival
1c60b24baa Add a loader tunable "hw.broken_txfifo" which enables a workaround for a
bug in old versions of QEMU (and Xen, and other places using QEMU code).
On those buggy emulated UARTs, the "TX idle" interrupt gets lost; with
this workaround, we spinwait for the TX to happen and then send ourselves
the interrupt.  It's ugly but it works, while minimizing the impact on
the code for the !broken_txfifo case.

MFC after:	2 weeks
2013-01-27 23:33:42 +00:00
Olivier Houchard
11e55f9108 Disable the TX ready interrupts once we received one, some UART won't clear
the IIR_TXRDY bit upon reading.

Reviewed by:	marcel
2011-11-02 20:45:44 +00:00
Marcel Moolenaar
5bdddc29c2 Ignore MCR[6] during the probe to fix a false negative. Bit 6 of the
MCR register on the Sunix Sun1699 chip tends to be set but doesn't
seem to have a function. That is, FreeBSD just works (provided the
correct RCLK is used) regardless.

PR:		kern/129663
Diagnostics:	Eygene Ryabinkin <rea-fbsd at codelabs.ru>
MFC after:	3 days
2011-05-26 17:02:56 +00:00
Rebecca Cran
6bccea7c2b Fix typos - remove duplicate "the".
PR:	bin/154928
Submitted by:	Eitan Adler <lists at eitanadler.com>
MFC after: 	3 days
2011-02-21 09:01:34 +00:00
Marius Strobl
f6ffc3c26b Remove redundant checking of sc_leaving (uart_intr() already handles this).
Approved by:	marcel
2010-05-02 19:07:19 +00:00
Marcel Moolenaar
d7ae5af5c4 Fix hangs caused by hardware that signals receive errors
(framing, parity, etc), but does not indicate characters
being received. Since no chracters have been received,
ignore the line errors.

PR:		131006
MFC after:	3 days
2009-04-08 00:14:06 +00:00
Benno Rice
0aefb0a63c The XScale PXA255 has three generally ns16x50 compatible UARTs. One of the
variations from normal 16x50 behaviour however is the the use of a normally
unused bit of IER to control RX timeout interrupts independently of the
generally used RXRDY bit.  If this bit is not enabled, we only ever get
interrupts when the FIFO is full, never before.  This is not very useful when
the UART is being used as a console.

In order to support this without causing potential problems on more "normal"
16x50 variants, this change introduces two hints for the uart device, ier_mask
and ier_rxbits.  These can be used to override which bits get set and cleared
when we're enabling and disabling RX interrupts.

Reviewed by:	marcel
2008-05-30 01:57:13 +00:00
Sam Leffler
823c77d78b add device hints to control the rx FIFO interrupt level on 16550A parts
PR:		kern/121421
Submitted by:	UEMURA Tetsuya
Reviewed by:	marcel
MFC after:	2 weeks
2008-03-12 19:09:20 +00:00
Marcel Moolenaar
35777a2a79 Don't use a time-limiting loop that's defined in terms of the baudrate
in the putc() method.  Likewise, in the getc() method, don't check for
received characters with an interval defined in terms of the baudrate.
In both cases it works equally well to implement a fixed delay.  More
importantly, it avoids calculating a delay that's roughly 1/10th the
time it takes to send/receive a character. The calculation is costly
and happens for every character sent or received, affecting low-level
console or debug port performance significantly. Secondly, when the
RCLK is not available or unreliable, the delays could disrupt normal
operation.

The fixed delay is 1/10th the time it takes to send a character at
230400 bps.
2007-04-03 01:21:10 +00:00