Support the "usr" and "os" qualifiers on arm64 events to restrict
event counting to either usermode or the kernel, respectively. If
neither qualifier is given, events are counted in both.
Reviewed by: emaste
Sponsored by: University of Cambridge, Google, Inc.
Differential Revision: https://reviews.freebsd.org/D34527
(cherry picked from commit 6bb7ba4aa1)
These are all "standard microarchitectural events", which in theory are
supported by every ARMv8 processor. In practice, it depends on the
pmu-event definitions being complete and accurate, which they are not
for every processor. Still, these aliases should be functional on the
majority of systems.
PR: 254532
Reported by: emaste
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D35550
(cherry picked from commit 6f50b73ee5)
Thanks to the recently updated import of the jevents utility by mav@, we
can now compile the latest version of these event definitions. This
should support a wider set of common ARMv8 processors, for example, the
Cortex-A72 in the Raspberry Pi 4.
This brings this folder in sync with Linux commit 62e6eb8d5454.
Reviewed by: emaste
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D35549
(cherry picked from commit 9d97138e2d)
It is recommended by Intel to use fixed counters when possible to
leave programmable ones for different events.
This fixes `pmc stat`, which tries to count 6 events same time, while
many Intel CPUs have only 4 programmable counters.
MFC after: 1 month
(cherry picked from commit e144cd92bb)
Intel json's now have pretty reasonable fixed counters representation
via event=0 and umask. Hardcoded values create more confusion than fix.
MFC after: 1 month
(cherry picked from commit 73b7b181e6)
This file is shared with Linux. Having local style patches does not
help with updating it.
This reverts commit 3ea691c261.
(cherry picked from commit 51f329660f)
This is useful for processors where we don't have an event table; in
those cases we default to a Cortex A8 (armv7) or Cortex A53 (arm64) in
order to attempt to provide something useful, but you're then limited to
the counters in those tables, some of which may also not be implemented
(e.g. LD/ST_RETIRED are no longer implemented in more recent cores,
replaced by LD/ST_SPEC).
Adding the raw EVENT_xxH event lists to each table ensures that you can
always request the exact events you want, regardless of what has been
detected or is known.
Reviewed by: mhorne
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D33805
(cherry picked from commit 9f22e0959b)
Make it mostly compatible with what's defined for Intel. Except where
noted, these are defined for all of amdzen(1|2|3).
Reviewed by: emaste
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D32162
(cherry picked from commit a20c10893e)
Looking for "tsc-tsc" in the pmu tables will fail every time. Instead,
make this an alias for the static TSC event defined in pmc_events.h.
This fixes 'pmcstat -s cycles' on Intel and AMD.
Reviewed by: emaste
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D32197
(cherry picked from commit 937539e0a3)
Support for Pentium events was removed completely in e92a1350b5.
Don't bump .Dd where we are just removing xrefs.
Reviewed by: emaste
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D31423
(cherry picked from commit d78896e46f)
8cc3815f:
hwpmc_arm64: accept raw event codes for PMC_OP_PMCALLOCATE
Make it possible to specify event codes without an offset of
PMC_EV_ARMV8_FIRST, by setting a machine-dependent flag. This is
required to make use of event definitions from pmu-events.
Reviewed by: ray (slightly earlier version)
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D3060228dd6730:
libpmc: enable pmu_utils on arm64
This allows supported libpmc to query/select from the pmu-events table,
which may have a more complete set of events than what we define
manually. A future update to these definitions should greatly improve
this support. The alias table is empty for now, until this future import
is complete.
Add the Foundation's copyright for recent work on this file.
Reviewed by: ray (slightly earlier version)
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D3060327ea55fc:
libpmc/hwpmc: fix issues with arm64 pmu-events support
Due to a mis-merge, the changes committed to libpmc never called
pmu_parse_event(), or set pm->pm_ev. However, this field shouldn't be
used to carry the actual pmc event code anyway, as it is expected to
contain the index into the pmu event array (otherwise, it breaks event
name lookup in pmclog_get_event()). Add a new MD field,
pm_md.pm_md_config, to pass the raw event code to arm64_allocate_pmc().
Additionally, the change made to pmc_md_op_pmcallocate was incorrect, as
this is a union, not a struct. Restore the proper padding size.
Reviewed by: luporl, ray, andrew
Fixes: 28dd6730a5 ("libpmc: enable pmu_utils on arm64")
Fixes: 8cc3815f02 ("hwpmc_arm64: accept raw event codes...")
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D31221
(cherry picked from commit 8cc3815f02)
(cherry picked from commit 28dd6730a5)
(cherry picked from commit 27ea55fc65)
The current version has every function stubbed out for !x86. Only two
functions (pmu_alias_get() and pmc_pmu_pmcallocate() are really platform
dependent, so reduce the width of the ifdefs and remove some of the
stubs.
Reviewed by: ray
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D30532
(cherry picked from commit 0024f1aa77)
Although currently unused, there are only pmu event definitions for
POWER8 and POWER9. There is no sense in building these on 32-bit
platforms.
Sponsored by: The FreeBSD Foundation
(cherry picked from commit 507d68984a)
This is preferred over $MACHINE_ARCH for these types of checks, although
it makes no difference for amd64 or i386. No functional change intended.
Sponsored by: The FreeBSD Foundation
(cherry picked from commit 3864da302a)
There is a single consumer, the pmc utility, that clearly has knowledge
of which counters it is expecting. Remove this function and have it
use common counter aliases instead.
Reviewed by: gnn
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D30528
(cherry picked from commit ec66cc955b)
It has never been a part of upstream's struct pmu_event. The jevents
utility will not fill this field, so remove it.
Reviewed by: gnn
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D30530
(cherry picked from commit 0c915023db)
The jevents build tool will create an empty table if it doesn't find any
events, so we can remove the extra $MACHINE_CPUARCH checks.
Reviewed by: gnn, ray, emaste
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D30531
(cherry picked from commit 689c7e7975)
The typo prevents the counter from being allocated.
This fixes e.g. pmcstat -s instructions sleep 5
Reviewed by: mizhka, gnn, ray, emaste
MFC after: 5 days
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D30527
(cherry picked from commit bc1a6a9d69)
On x86, the pmu_events table is the source of truth for finding
supported events. However, events not found there may still be present
in the kernel's static event tables. For example, the pmc.soft(3) events
will never be available from pmu-events.
Update pmc_allocate() to search the legacy event tables if
pmc_pmu_pmcallocate() fails to return a result. This allows both event
sources to be consulted before giving up, thus restoring pmc.soft(3) and
pmc.tsc(3) on x86.
Reviewed by: emaste
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D30216
(cherry picked from commit dfdc57e8aa)
This logic was added for handling some of the complicated relationships
between events and x86 CPU models. Since that logic has been mostly
removed from libpmc(3) in favor of pmu-events, this no longer serves
much of a purpose. Mapping CPU types to event tables is already handled
by the switch statement in pmc_init().
Reviewed by: ray, emaste
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D30196
(cherry picked from commit da13ef6aa0)
All uses of this macro were removed in e92a1350b5. Remove
cpu_has_iaf_counters as well.
Reviewed by: ray, emaste
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D30195
(cherry picked from commit 4d8d74a4f5)
- new sentence, new line
- tab in filled text
- unusual Xr order
- skipping paragraph macro: Pp before Ss
Reviewed by: bcr
Differential Revision: https://reviews.freebsd.org/D31143
(cherry picked from commit 0b12932525)
This was added in b2ca2e50b9, and serves to provide an initial value
to the PMC, eliminating the need for a second syscall via pmc_set(3).
Reviewed by: gnn, 0mp (manpages)
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D29885
(cherry picked from commit 50f6c13997)
Revision r334749 Added some C++ code to libpmc. It didn't change the ABI,
but it did introduce a dependency on libc++. Nobody noticed because every
program that in the base system that uses libpmc is also C++.
Reported-by: Dom Dwyer <dom@itsallbroken.com>
Reviewed By: vangyzen
Differential Revision: https://reviews.freebsd.org/D28550
(cherry picked from commit 04e34c0202)
This change adds support for POWER8/9 performance counters.
Reviewed by: jhibbits
Sponsored by: Eldorado Research Institute (eldorado.org.br)
Differential Revision: https://reviews.freebsd.org/D26113
Use MACHINE_CPUARCH with arm64 (aarch64) when we build code that could run
on any 64-bit Arm instruction set. This will simplify checks in downstream
consumers targeting prototype instruction sets.
The only place we check for MACHINE_ARCH == aarch64 is when building the
device tree blobs. As these are targeting current generation ISAs.
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D26370
This adds support for the Cortex-A76 and Neoverse-N1 PMU counters to pmc.
While here add more PMCR_IDCODE values and check the implementers code is
correct before setting the PMU type.
Reviewed by: bz, emaste (looks reasonable to me)
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D25959
Use the existing PMC_CPUID_LEN to size pmc_cpuid in the kernel and various
buffers for reading it in libpmc. This avoids some extra syscalls and
malloc/frees.
While in here, use strlcpy to copy a user-provided cpuid string instead of
memcpy, to make sure we terminate the buffer.
Reviewed by: mav
MFC after: 1 week
Sponsored by: iXsystems, Inc.
Differential Revision: https://reviews.freebsd.org/D25679
Generate libpmc_events.c in a temporary file first and only overwrite it
if the files are actually different.
This avoids compiling and relinking the different variants of libpmc on
every incremental build.
Reviewed By: jhb
Differential Revision: https://reviews.freebsd.org/D24784
It follows the equivalent Linux change to be able to differentiate
skylakex and cascadelakex, sharing the same model but not stepping.
This fixes skylakex handling broken by r363144.
MFC after: 6 days
