Commit graph

21 commits

Author SHA1 Message Date
Andrew Turner
d546313602 arm64: Add CPTR_TRAP_ALL and use it in vmm
Add a new macro that enables all CPTR_EL2 traps. This helps ensure we
trap all extensions we don't support.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D46516
2024-09-11 10:25:09 +00:00
Andrew Turner
9f3d15fda2 arm64: Add CPTR_E2H_TTA
The TTA field moves depending on the HCR_EL2.E2H field. Add a macro to
hold the E2H == 1 case.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D46515
2024-09-11 10:25:09 +00:00
Andrew Turner
16e661921a arm64: Add E2H to CPTR_EL2 register values
Rename register fields that are only valid when HCR_EL2.E2H == 1. Some
fields move around depending on the value of the E2H field.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D46514
2024-09-11 10:25:09 +00:00
Andrew Turner
7a488d83b3 arm64: Adjust the indentation of CPTR_EL2 values
Reviewed by:	emaste
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D46513
2024-09-11 10:25:08 +00:00
Zachary Leaf
610348a904 arm64: add additional MDCR_EL2 fields
Monitor Debug Configuration Register provides EL2 configuration options
for self-hosted debug and the Performance Monitors Extension.

Reviewed by:	andrew
Sponsored by:   Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D46191
2024-09-09 15:56:53 +00:00
Andrew Turner
d52c319042 arm64: Make shareability attributes dynamic
When LPA2 is enabled the shareability attribute in the page table are
replaces with output address bits. To support a larger physical address
space make this attribute dynamic so we only set it when appropriate.

Reviewed by:	alc, kib
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D46394
2024-09-05 13:12:17 +01:00
Andrew Turner
a745cdc19b arm64/vmm: Teach the vtimer about VHE
Teach the virtual timer about the cnthctl_el2 field layout under VHE.
As with non-VHE we need to trap the physical timer and not trap the
virtual timer.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D46074
2024-08-20 08:49:15 +00:00
Andrew Turner
034c83fd7d arm64: Ensure sctlr and pstate are in known states
Before entering the kernel exception level ensure sctlr_el2 and
sctlr_el1 are in a known state. The EOS flag needs to be set to ensure
an eret instruction is a context synchronization event.

Set spcr_el1 when entering the kernel from EL1 and use an eret
instruction to return to the caller. This ensures the CPU pstate is
consistent with the value in spcr_el1 as it is the only way to set it
directly.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D45528
2024-07-23 09:25:05 +00:00
Andrew Turner
997511dffe arm64: Support counter access with E2H
When entering the kernel with the E2H field set the layout of the
cnthctl_el2 register changes. Use the correct field locations to enable
access to the counter and timer registers from EL1.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D45529
2024-07-23 09:25:05 +00:00
Andrew Turner
b3bbec37ba arm64: Add a macro to find a VM fault address
Add a macro to find which bits from far_el2 are needed to be copied
to get the full intermediate physical address (IPA).

The hpfar_el2 register only contains a 4k aligned fault address. We
need to include the lower bits from far_el2 if we need the full
faulting IPA.
2024-02-21 18:55:32 +00:00
Andrew Turner
9c52f98c9f arm64: Add the TCR_EL2.PS mask 2024-02-21 18:55:32 +00:00
Mark Johnston
4f12883c36 arm64: Add register definitions for MDCR_EL2
This is needed to support the bhyve gdb stub implementation on arm64.

Reviewed by:	andrew
MFC after:	1 week
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D42867
2023-12-01 13:31:13 -05:00
Warner Losh
95ee2897e9 sys: Remove $FreeBSD$: two-line .h pattern
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
2023-08-16 11:54:11 -06:00
Kyle Evans
dc8616edc5 arm64: set FPEN if we're stuck with HCR_EL2.E2H
On Apple Silicon systems, E2H can't actually be cleared; we're stuck
with it.  Check it again when we're setting up CPTR_EL2 and set FPEN
appropriately to avoid later trapping to EL2 on writes to SIMD
registers.

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D38819
2023-02-28 16:16:14 -06:00
Andrew Turner
2468c61958 Add more arm64 hypervisor registers
These will be used by bhyve.

Sponsored by:	Innovate UK
Sponsored by:	The FreeBSD Foundation
2022-11-15 17:26:52 +00:00
Andrew Turner
ae43a817d3 Put the arm64 vttbr_el2 register into a state
Zero the vttbr_el2 register on each CPU so we can tell if we are
running the host or guest kernel from a hypervisor.

Obtained from:	https://github.com/FreeBSD-UPB/freebsd-src (earlier version)
Sponsored by:	Innovate UK
Sponsored by:	The FreeBSD Foundation
2022-11-15 17:26:52 +00:00
Andrew Turner
12c1c65d8a Mark 64-bit arm64 hypervisor registers with UL
These are 64-bit. Mark them as unsigned long so we don't rely on
undefined behaviour or shift a 32-bit value more than 32 bits.

Sponsored by:	Innovate UK
Sponsored by:	The FreeBSD Foundation
2022-10-11 14:01:16 +01:00
Andrew Turner
3c1bfadaf9 Update the arm64 HCR_EL2 registers
They are valid as of the ARMv8.7 XML.

While here switch to use shifted values as they are easier to compare
with values in the Arm Reference Manual.

Sponsored by:	The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D31093
2021-07-14 19:28:16 +00:00
Andrew Turner
db724d9005 Update the hypervisor registers
- Add more registers needed by bhyve [1]
 - Move EL2 registers from armreg.h to hypervisor.h
 - Add the register name to hypervisor.h

Obtained from:	https://github.com/FreeBSD-UPB/freebsd [1]
2020-03-06 14:46:50 +00:00
Andrew Turner
b4b90c1f4c Add the ARMv8.3 HCR_EL2 register fields.
MFC after:	1 month
Sponsored by:	DARPA, AFRL
2018-11-01 17:05:10 +00:00
Andrew Turner
e5acd89c78 Bring in the start of the arm64 kernel.
This is only the minimum set of files needed to boot in qemu. As such it is
missing a few things.

The bus_dma code is currently only stub functions with a full implementation
from the development tree to follow.

The gic driver has been copied as the interrupt framework is different. It
is expected the two drivers will be merged by the arm intrng project,
however this will need to be imported into the tree and support for arm64
would need to be added.

This includes code developed by myself, SemiHalf, Ed Maste, and Robin
Randhawa from ARM. This has been funded by the FreeBSD Foundation, with
early development by myself in my spare time with assistance from Robin.

Differential Revision:	https://reviews.freebsd.org/D2199
Reviewed by:	emaste, imp
Relnotes:	yes
Sponsored by:	The FreeBSD Foundation
2015-04-13 14:43:10 +00:00