different PHY instance being selected and isolation out into the wrappers
around the service methods rather than duplicating them over and over
again (besides, a PHY driver shouldn't need to care about which instance
it actually is).
- Centralize the check for the need to isolate a non-zero PHY instance not
supporting isolation in mii_mediachg() and just ignore it rather than
panicing, which should sufficient given that a) things are likely to
just work anyway if one doesn't plug in more than one port at a time and
b) refusing to attach in this case just leaves us in a unknown but most
likely also not exactly correct configuration (besides several drivers
setting MIIF_NOISOLATE didn't care about these anyway, probably due to
setting this flag for no real reason).
- Minor fixes like removing unnecessary setting of sc->mii_anegticks,
using sc->mii_anegticks instead of hardcoded values etc.
number of unexplained interrupt problems. For some reason, using HPET
interrupts there breaks HDA sound. Legacy route mode interrupts reported
to work fine there.
controllers. bge(4) exported MAC statistics on controllers that
maintain the statistics in the NIC's internal memory. Newer
controllers require register access to fetch these values. These
counters provide useful information to diagnose driver issues.
parent driver. Use that information to configure flow-control.
One drawback is there is no way to disable flow-control as we still
don't have proper way to not advertise RX/TX pause capability to
link partner. But I don't think it would cause severe problems and
users can selectively disable flow-control in switch port.
- license clause now contains "AUTHOR AND CONTRIBUTORS"
instead of just "AUTHOR"
- Add license/copyright to gpioc.c
Spotted by: Edward Tomasz Napierala, Andrew Turner
which were raised during hot-swap events. Now such events trigger cam
rescans, as is done in the mps driver.
Submitted by: Mark Johnston <mjohnston at sandvine dot com>
has reached. This reduced number of dropped frames when
flow-control is enabled. Previously it dropped incoming frames once
RX MBUF low watermark has reached. The value used in MAC RX MBUF
low watermark is greater than or equal to 4 so receiving two more
RX frames should not be a problem.
Obtained from: OpenBSD
- GPIO bus controller interface
- GPIO bus interface
- Implementation of GPIO led(4) compatible device
- Implementation of iic(4) bus over GPIO (author: Luiz Otavio O Souza)
Tested by: Luiz Otavio O Souza, Alexandr Rybalko
- Sync shared code with Intel internal
- New client chipset support added
- em driver - fixes to 82574, limit queues to 1 but use MSIX
- em driver - large changes in TX checksum offload and tso
code, thanks to yongari.
- some small changes for watchdog issues.
- igb driver - local timer watchdog code was missing locking
this and a couple other watchdog related fixes.
- bug in rx discard found by Andrew Boyer, check for null pointer
MFC: a week
too many bge(4) controllers there and model name does not
necessarily match asic/chip revision. Relying on VPD string made
it hard to identify exact asic/chip revision so the first step to
debug bge(4) was getting exact asic/chip information with verbose
boot which may not be available on production server.
address spaces
There has been no need to do that starting with ACPICA 20040427 as
AcpiEnableSubsystem() installs the handlers automatically.
Additionaly, explicitly calling AcpiInstallAddressSpaceHandler before
AcpiEnableSubsystem is not supported by ACPICA and leads to too early
execution of _REG methods in some DSDTs, which may result in problems.
Big thanks to Robert Moore of ACPICA/Intel for explaining the above.
Reported by: Daniel Bilik <daniel.bilik@neosystem.cz>
Tested by: Daniel Bilik <daniel.bilik@neosystem.cz>
Reviewed by: jkim
Suggested by: "Moore, Robert" <robert.moore@intel.com>
MFC after: 1 week
StarFire controller does not require controller reinitialization to
program perfect filters. While here, make driver immediately exit
from interrupt/polling handler if driver reinitialized controller.
PR: kern/87506
- Add a single sysctl procedure to all three drivers to read an arbitrary
register (the register is passed as arg2). Use it to replace existing
routines in igb(4) that used a separate routine for each register, and
to add support for missing stats in em(4) and lem(4).
- Move the 'rx_overruns' and 'watchdog_timeouts' stats out of the MAC stats
section as they are driver stats, not MAC counters.
- Simplify the code that creates per-queue stats in igb(4) to use a single
loop and remove duplicated code.
- Properly read all 64 bits of the 'good octets received/transmitted' in
em(4) and lem(4).
- Actually read the interrupt count registers in em(4), and drop the
'host to card' sysctl stats from em(4) as they are not implemented in
any of the hardware this driver supports.
- Restore several stats to em(4) that were lost in the earlier stats
conversion including per-queue stats.
- Export several MAC stats in em(4) that were exported in igb(4) but not
in em(4).
- Export stats in lem(4) using individual sysctls as in em(4) and igb(4).
Reviewed by: jfv
MFC after: 1 week
the device:
- unobscure some of the code by moving it into its own functions
- get rid of some magic numbers
- create similar structure as the reference driver has, this should
make further syncs easier
particular edge case where X-axis resolution is not multiple of font width.
Now we just advance enough scan lines, then deduct a partial scan line.
It is more intuitive than the previous code. Apply the same wisdom to EGA
and VGA planar renderers for consistency.
Reported by: David DEMELIER (demelier dot david at gmail dot com)
When the driver is completely saturated with commands (1024 in the
case of the SAS2008 in my test system), I/O stops. If we tell CAM
that we have one less command slot than we have actually allocated,
everything works fine. We also need a few extra command slots to
allow for aborts and other task management commands to be sent down.
This needs more investigation to determine the root cause, but for
now this fixes things in my testing.
mps.c: Change a printf() to mps_printf().
mps_sas.c: Subtract 5 command slots when we tell CAM how many
commands we can handle.
Add some commented-out logic to print the contents
the CDBs for timed-out commands. This can help
in debugging devices that are timing out. This
will be uncommented once I bring some CAM changes in.
Reported by: Andrew Boyer <aboyer at averesystems dot com>
According to the MPT2 spec, task management commands are
serialized, and so no I/O should start while task management
commands are active.
So, to comply with that, freeze the SIM queue before we send any
task management commands (abort, target reset, etc.) down to the
IOC. We unfreeze the queue once the task management command
completes.
It isn't clear from the spec whether multiple simultaneous task
management commands are supported. Right now it is possible to
have multiple outstanding task management commands, especially in
the abort case. Multiple outstanding aborts do complete
successfully, so it may be supported.
We also don't yet have any recovery mechanism (e.g. reset the IOC)
if the task management command fails.
already updated after allocating mbuf so driver had to use the last
index instead of using next producer index. This should fix driver
hang which may happen under high network load.
Reported by: Igor Sysoev <is <> rambler-co dot ru>, Vlad Galu <dudu <> dudu dot ro>
Tested by: Igor Sysoev <is <> rambler-co dot ru>, Vlad Galu <dudu <> dudu dot ro>
MFC after: 10 days
Add a drain function for struct sysctl_req, and use it for a variety
of handlers, some of which had to do awkward things to get a large
enough SBUF_FIXEDLEN buffer.
Note that some sysctl handlers were explicitly outputting a trailing
NUL byte. This behaviour was preserved, though it should not be
necessary.
Reviewed by: phk (original patch)
- Don't probe for PHYs if we already know to use a SERDES. Unlike as with
cas(4) this only serves to speed up the the device attach though and can
only be determined via the OFW device tree but not from the VPD.
- Don't touch the MIF when using a SERDES.
- Add some missing bus space barriers, mainly in the PCS code path.
- D_TRACKCLOSE may be used there as d_close() are expected to match up
d_open() calls
- Replace the hand-crafted counter and flag with the
device_busy()/device_unbusy() proper usage.
Sponsored by: Sandvine Incorporated
Reported by: Mark Johnston <mjohnston at sandvine dot com>
Tested by: Mark Johnston
Reviewed by: emaste
MFC after: 10 days
when the original offset is bigger than size of one page. X86BIOS macros
cannot be used here because it is assumed address is only linear in a page.
Tested by: netchild
unexpected things in copyout(9) and so wiring the user buffer is not
sufficient to perform a copyout(9) while holding a random mutex.
Requested by: nwhitehorn
ACPI specification sates that if P_LVL2_LAT > 100, then a system doesn't
support C2; if P_LVL3_LAT > 1000, then C3 is not supported.
But there are no such rules for Cx state data returned by _CST. If a
state is not supported it should not be included into the return
package. In other words, any latency value returned by _CST is valid,
it's up to the OS and/or user to decide whether to use it.
Submitted by: nork
Suggested by: mav
MFC after: 1 week
The main goal of this is to generate timer interrupts only when there is
some work to do. When CPU is busy interrupts are generating at full rate
of hz + stathz to fullfill scheduler and timekeeping requirements. But
when CPU is idle, only minimum set of interrupts (down to 8 interrupts per
second per CPU now), needed to handle scheduled callouts is executed.
This allows significantly increase idle CPU sleep time, increasing effect
of static power-saving technologies. Also it should reduce host CPU load
on virtualized systems, when guest system is idle.
There is set of tunables, also available as writable sysctls, allowing to
control wanted event timer subsystem behavior:
kern.eventtimer.timer - allows to choose event timer hardware to use.
On x86 there is up to 4 different kinds of timers. Depending on whether
chosen timer is per-CPU, behavior of other options slightly differs.
kern.eventtimer.periodic - allows to choose periodic and one-shot
operation mode. In periodic mode, current timer hardware taken as the only
source of time for time events. This mode is quite alike to previous kernel
behavior. One-shot mode instead uses currently selected time counter
hardware to schedule all needed events one by one and program timer to
generate interrupt exactly in specified time. Default value depends of
chosen timer capabilities, but one-shot mode is preferred, until other is
forced by user or hardware.
kern.eventtimer.singlemul - in periodic mode specifies how much times
higher timer frequency should be, to not strictly alias hardclock() and
statclock() events. Default values are 2 and 4, but could be reduced to 1
if extra interrupts are unwanted.
kern.eventtimer.idletick - makes each CPU to receive every timer interrupt
independently of whether they busy or not. By default this options is
disabled. If chosen timer is per-CPU and runs in periodic mode, this option
has no effect - all interrupts are generating.
As soon as this patch modifies cpu_idle() on some platforms, I have also
refactored one on x86. Now it makes use of MONITOR/MWAIT instrunctions
(if supported) under high sleep/wakeup rate, as fast alternative to other
methods. It allows SMP scheduler to wake up sleeping CPUs much faster
without using IPI, significantly increasing performance on some highly
task-switching loads.
Tested by: many (on i386, amd64, sparc64 and powerc)
H/W donated by: Gheorghe Ardelean
Sponsored by: iXsystems, Inc.
Bring in a driver for the LSI Logic MPT2 6Gb SAS controllers.
This driver supports basic I/O, and works with SAS and SATA drives and
expanders.
Basic error recovery works (i.e. timeouts and aborts) as well.
Integrated RAID isn't supported yet, and there are some known bugs.
So this isn't ready for production use, but is certainly ready for
testing and additional development. For the moment, new commits to this
driver should go into the FreeBSD Perforce repository first
(//depot/projects/mps/...) and then get merged into -current once
they've been vetted.
This has only been added to the amd64 GENERIC, since that is the only
architecture I have tested this driver with.
Submitted by: scottl
Discussed with: imp, gibbs, will
Sponsored by: Yahoo, Spectra Logic Corporation
This reflects actual type used to store and compare child device orders.
Change is mostly done via a Coccinelle (soon to be devel/coccinelle)
semantic patch.
Verified by LINT+modules kernel builds.
Followup to: r212213
MFC after: 10 days
malo and mwl use the firmware framework to access firmware images.
Depending on the firmware modules itself is not required and in this
case even wrong because no modules with those names exist.
Pointed out by: brucec
MFC after: 1 week
handlers, some of which had to do awkward things to get a large enough
FIXEDLEN buffer.
Note that some sysctl handlers were explicitly outputting a trailing NUL
byte. This behaviour was preserved, though it should not be necessary.
Reviewed by: phk
PCI status register to map its current name.
- Use PCIM_* rather than PCIR_* for constants for fields in various AER
registers. I got about half of them right in the previous commit.
MFC after: 1 week
K2 SATA controllers. The chip's status register must be read first, and
as a long, for other registers to be correctly updated after a command, and
this includes the command sequence in device detection as well as the
previously handled case after interrupts. While here, clean up some
previous hacks related to this controller.
Reported by: many
Reviewed by: mav
MFC after: 3 weeks
PCI-express. I used PCIZ_* for ID constants (plain capability IDs use
PCIY_*).
- Add register definitions for the Advanced Error Reporting, Virtual
Channels, and Device Serial Number extended capabilities.
- Teach pciconf -c to list extended as well as plain capabilities. Adds
more detailed parsing for AER, VC, and device serial numbers.
MFC after: 2 weeks
are still bound to BSP. It confuses timer management logic in per-CPU mode
and may cause timer not being reloaded. Check such cases on interrupt
arival and reload timer to give system some more time to manage proper
binding.
discrepencies from the igb version which was the target.
Change the message when neither MSI or MSIX are enabled
and a fallback to Legacy interrupts happen, the existing
message was confusing.
- add identify method to create driver's own device_t
- successfully probe only driver's own device_t instead of any device_t
- (ab)use device order to hopefully be probed/attached after acpi_wmi
PR: kern/147858
Tested by: Maciej Suszko <maciej@suszko.eu>
MFC after: 1 week
- Add special check for case when time expires before being programmed.
This fixes interrupt loss and respectively timer death on attempt to
program very short interval. Increase minimal supported period to more
realistic value.
- Add support for hint.hpet.X.allowed_irqs tunable, allowing manually
specify which interrupts driver allowed to use. Unluckily, many BIOSes
program wrong allowed interrupts mask, so driver tries to stay on safe
side by not using unshareable ISA IRQs. This option gives control over
this limitation, allowing more per-CPU timers to be provided, when FSB
interrupts are not supported. Value of this tunable is bitmask.
- Do not use regular interrupts on virtual machines. QEMU and VirtualBox
do not support them properly, that may cause problems. Stay safe by default.
Same time both QEMU and VirtualBox work fine in legacy_route mode.
VirtualBox also works fine if manually specify allowed ISA IRQs with above.
Both deadline and current_time are time_seconds (+ utc_offset())
casted to unsigned long long. No need to cast to or print as pointers.
MFC after: 4 days
to pad with 0xFF when it encounter short frames. According to RFC
1042 the pad bytes should be 0x00.
Because manual padding consumes extra CPU cycles, introduce a new
tunable which controls the padding behavior. Turning this tunable
on will have driver pad manually but it's disabled by default. Users
can enable software padding by setting the following tunable to
non-zero value.
dev.sis.%d.manual_pad="1"
PR: kern/35422 (patch not used)
prevented driver from working on big-endian machines. Also rewrite
station address programming to make it work on strict-alignment
architectures. With this change, sis(4) now works on sparc64 and
performance number looks good even though sis(4) have to apply
fixup code to align received frames on 2 bytes boundary on sparc64.
response to DMA activate FIS under certain circumstances. This is
recommended fix from chip datasheet. If triggered, this bug most likely
cause write command timeout.
MFC after: 2 weeks
value 0xff. On hot-plug this value confuses ata_generic_reset() device
presence detection logic. As soon as we already know drive presence from
SATA hard reset, hint ata_generic_reset() to wait for device signature
until success or full timeout.
greater than 65535 bytes then the CDC driver might not work as expected, which
is not likely with the existing USB speeds.
Submitted by: Hans Petter Selasky
allmulti is toggled. Controller does not require reinitialization.
This removes unnecessary controller reinitialization whenever
tcpdump is used.
While I'm here remove unnecessary variable reinitialization.
configured TX/RX MACs before getting a valid link. After that, when
link state change callback is called, it called device
initialization again to reconfigure TX/RX MACs depending on
resolved link state. This hack created several bad side effects and
it required more hacks to not collide with sis_tick callback as
well as disabling switching to currently selected media in device
initialization. Also it seems sis(4) was used to be a template
driver for long time so other drivers which was modeled after
sis(4) also should be changed.
TX/RX MACs are now reconfigured after getting a valid link. Fix for
short cable error is also applied after getting a link because it's
only valid when the resolved speed is 100Mbps.
While I'm here slightly reorganize interrupt handler such that
sis(4) always read SIS_ISR register to see whether the interrupt is
ours or not. This change removes another hack and make it possible
to nuke sis_stopped variable in softc.
o Enforce TX/RX descriptor ring alignment. NS data sheet says the
controller needs 4 bytes alignment but use 16 to cover both SiS
and NS controllers. I don't have SiS data sheet so I'm not sure
what is alignment restriction of SiS controller but 16 would be
enough because it's larger than the size of a TX/RX descriptor.
Previously sis(4) ignored the alignment restriction.
o Enforce RX buffer alignment, 4.
Previously sis(4) ignored RX buffer alignment restriction.
o Limit number of TX DMA segment to be used to 16. It seems
controller has no restriction on number of DMA segments but
using more than 16 looks resource waste.
o Collapse long mbuf chains with m_collapse(9) instead of calling
expensive m_defrag(9).
o TX/RX side bus_dmamap_load_mbuf_sg(9) support and remove
unnecessary callbacks.
o Initial endianness support.
o Prefer local alignment fixup code to m_devget(9).
o Pre-allocate TX/RX mbuf DMA maps instead of creating/destroying
these maps in fast TX/RX path. On non-x86 architectures, this is
very expensive operation and there is no need to do that.
o Add missing bus_dmamap_sync(9) in TX/RX path.
o watchdog is now unarmed only when there are no pending frames
on controller. Previously sis(4) blindly unarmed watchdog
without checking the number of queued frames.
o For efficiency, loaded DMA map is reused for error frames.
o DMA map loading failure is now gracefully handled. Previously
sis(4) ignored any DMA map loading errors.
o Nuke unused macros which are not appropriate for endianness
operation.
o Stop embedding driver maintained structures into descriptor
rings. Because TX/RX descriptor structures are shared between
host and controller, frequent bus_dmamap_sync(9) operations are
required in fast path. Embedding driver structures will increase
the size of DMA map which in turn will slow down performance.
not change interrupt vector if it is not pointing the ROM itself. Actually,
we just fail shadowing altogether if that is the case because the shadowed
copy will be useless for sure and POST may not be relocatable or useful.
While I'm here, fix a debugging message under bootverbose, really. r211829
fixed one case but broke another. Mea Culpa.
or not by comparing reported TX consumer index with saved index. So
remove unnecessary check done after freeing transmitted mbufs.
While I'm here nuke unnecessary variable initializations.
tag. All controllers that are not BCM5755 or higher have 4GB
boundary DMA bug. Previously bge(4) used 32bit DMA address to
workaround the bug(r199670). However this caused the use of bounce
buffers such that it resulted in poor performance for systems which
have more than 4GB memory. Because bus_dma(9) honors boundary
restriction requirement of DMA tag for dynamic buffers, having a
separate TX/RX mbuf DMA tag will greatly reduce the possibility of
using bounce buffers. For DMA buffers allocated with
bus_dmamem_alloc(9), now bge(4) explicitly checks whether the
requested memory region crossed the boundary or not.
With this change, only the DMA buffer that crossed the boundary
will use 32bit DMA address. Other DMA buffers are not affected as
separate DMA tag is created for each DMA buffer.
Even if 32bit DMA address space is used for a buffer, the chance to
use bounce buffer is still very low as the size of buffer is small.
This change should eliminate most usage of bounce buffers on
systems that have more than 4GB memory.
More correct fix would be teaching bus_dma(9) to honor boundary
restriction for buffers created with bus_dmamem_alloc(9) but it
seems that is not easy.
While I'm here cleanup bge_dma_map_addr() and remove unnecessary
member variables in bge_dmamap_arg structure.
Tested by: marcel
heavy I/O load.
Many thanks to LSI for continuing to support FreeBSD.
PR: kern/149968
Submitted by: LSI (Tom Couch)
Reported by: Kai Kockro <kkockro web de>
Tested by: Kai Kockro, jpaetzel
MFC after: 7 days
configuration function. For failed memory allocations, em(4)/lem(4)
called panic(9) which is not acceptable on production box.
igb(4)/ixgb(4)/ix(4) allocated the required memory in stack which
consumed 768 bytes of stack memory which looks too big.
To address these issues, allocate multicast array memory in device
attach time and make multicast configuration success under any
conditions. This change also removes the excessive use of memory in
stack.
Reviewed by: jfv
Just showing some buffer allocation error is more appropriate
action for drivers. This should fix occasional panic reported on
em(4) when driver encountered resource shortage.
Reviewed by: jfv
supported by many BIOSes to improve performance of VESA BIOS calls for real
mode OSes but it is not our intention here. However, this may help some
platforms where the video ROMs are inaccessible after suspend, for example.
Note it may consume up to 64K bytes of contiguous memory depending on video
controller model when it is enabled. This feature can be disabled by
setting zero to 'debug.vesa.shadow_rom' loader tunable via loader(8) or
loader.conf(5). The default is 1 (enabled), for now.
ID, plus the ability to force '16-bit mode' which really means NE-2000
mode. Other open source drivers suggest that the Holtek misbehaves if
you allow the 8-bit probe. Also, all of the PCI chips emulate
NE-2000ish cards, so always force 16-bit mode for memory transfers.
PR: 84202 (patch not used)
I'm not sure whether adding this logical id is correct or not
because Compex RL2000 is in the list of supported hardware list.
I guess the Compex RL2000 could be PCI variant while the controller
in question is ISA controller. It seems PNP compat id didn't match
or it had multiple compat ids so isa_pnp_probe() seemed to return
ENOENT.
PR: kern/80853
support WOL. Some controllers require additional 3-wire auxiliary
remote wakeup connector to draw power. More recent xl(4)
controllers may not need the wakeup connector though.
initialize controller from a known good state. Previously driver
used to issue controller reset while TX/RX DMA are in progress.
I guess resetting controller in active TX/RX DMA cycle is to ensure
stopping I/Os in xl_shutdown(). I remember some buggy controllers
didn't respond with stop command if controller is under high
network load at the time of shutdown so resetting controller was
the only safe way to stop the I/Os. However, from my experiments,
controller always responded with stop command under high network
load so I think it's okay to remove the xl_reset() in
device_shutdown handler.
Resetting controller also will clear configured RX filter which
in turn will make WOL support hard because driver have to reprogram
RX filter in WOL handler as well as setting station address.
datagrams with checksum value 0 when TX UDP checksum offloading is
enabled. Generating UDP checksum value 0 is RFC 768 violation.
Even though the probability of generating such UDP datagrams is
low, I don't want to see FreeBSD boxes to inject such datagrams
into network so disable UDP checksum offloading by default. Users
still override this behavior by setting a sysctl variable or loader
tunable, dev.bge.%d.forced_udpcsum.
I have no idea why this issue was not reported so far given that
bge(4) is one of the most commonly used controller on high-end
server class systems. Thanks to andre@ who passed the PR to me.
PR: kern/104826
Makefiles or *.mk files, use ${CC:T:Mfoo} instead, so only the basename
of the compiler command (excluding any arguments) is considered.
This allows you to use, for example, CC="/nondefault/path/clang -xxx",
and still have the various tests in bsd.*.mk identify your compiler as
clang correctly.
ICC if cases were also changed.
Submitted by: Dimitry Andric <dimitry at andric.com>
method is used by the PCI bus driver to query the power management system
to determine the proper device state to be used for a device during suspend
and resume. For the ACPI PCI bridge drivers this calls
acpi_device_pwr_for_sleep(). This removes ACPI-specific knowledge from
the PCI and PCI-PCI bridge drivers.
Reviewed by: jkim
If it does, don't then try reprogramming the NF "cap" values (ie
what values are the "maximum" value the NF can be) - instead,
just leave the current CCA value as the NF cap.
This was inspired by some similar work from ath9k. It isn't
a 100% complete solution (as there may be some reason where a
high NF CCA/cap is written, causing the baseband to stop thinking it
is able to transmit, leading to stuck beacon and interface reset)
which I'll investigate and look at fixing in a later commit.
Obtained from: Linux
AR5416 and later chipsets.
ath_hal_calibrateN() calls the HAL calibrateN function with rxchainmask=0x1.
This is not necessarily the case for AR5416 and later chipsets.
list of devices supported by uplcom(4) with the following sources:
NetBSD src/sys/dev/usb/uplcom.c 1.70
OpenBSD src/sys/dev/usb/uplcom.c 1.52
Linux drivers/usb/serial/pl2303.h from kernel 2.6.35
BeOS usb_serial/driver.c 1.32
Give several devices better descriptions, and rename
PROLIFIC2 -> NETINDEX while here to match everybody else.
MFC after: 6 weeks (after r211111)
flag immediately so it's only set once per longcal interval.
Without this, the current AR5416 code will continuously spam NF
calibrations during a periodic calibration if the longcal flag
is set. The longcal flag wouldn't be cleared until the calibration
method indicates that calibrations are "complete".
This drops the rate of NF calibration updates down from "once every
shortcal" (ie, every 100ms) during a periodic calibration, to only
once per "longcal" interval. Spamming NF calibrations every 100ms
caused some potentially horrific issues in noisy environments as
NF calibrations can take longer than 100ms and this spamming can
cause invalid NF calibration results to be read back - leading to
missed beacons, and thus leading to a stuck beacon situation.
Stuck beacons cause interface resets, which restart calibrations.
This means that the longcal calibration runs every 100ms (shortcal)
until all initial calibrations are completed. This spamming can then
cause the above issues which leads to stuck beacons, leading to
interface resets, etc, etc. Quite annoying.
within the device table. This code uses the same algorithm as used in the
Linux, NetBSD and DragonflyBSD driver.
While investigating this, it became apparent that the Linux driver always
initialises the device, and not just in the PL2303HX case. Change
uplcom(4) to do the same.
This change allows us to synchronize our device ID list with Linux and
NetBSD, without requiring knowledge of the chipset in use.
Reviewed by: hselasky
MFC after: 6 weeks
controller. These controllers are known as L1D(AR8151) and
L2CB/B2(AR8152). This change adds supports for the following
controllers.
o AR8151 v1.0(L1D) gigabit ethernet controller
o AR8151 v2.0(L1D) gigabit ethernet controller
o AR8152 v1.1(L2CB) fast ethernet controller
o AR8152 v2.0(L2CB2) fast ethernet controller
These controllers have the same feature of AR8131/AR8132 and
support improved power saving control. The user visible change at
this moment is reduced jumbo frame size from 9KB to 6KB. Many
thanks to Atheros for continuing to support FreeBSD.
HW donated by: Atheros Communications, Inc.
- Increase target limit from 4 to 64; this limit will be removed entirely
at a later time.
- Improve recovery from lost network connections.
- Fix some potential deadlocks and a serious memory leak.
- Fix incorrect use of MH_ALIGN (instead of M_ALIGN), which makes no
practical difference, but triggers a KASSERT with INVARIANTS.
- Fix some warnings in iscontrol(8) and improve the man page somewhat.
Submitted by: Daniel Braniss <danny@cs.huji.ac.il>
Sponsored by: Dansk Scanning A/S, Data Robotics Inc.
like memory mapped register access. Typical problem from the issue
was MII access returned unreliable values. I'm not sure this comes
from lack of register flushing in MII access after accessing
STE_PHYCTL register though.
To address the issue, read hints data that controls which type of
memory mapping should be used in driver. ste(4) still prefers
memory mapping to io mapping but honor hints entered by user except
for controllers that have problems with memory mapping.
The hint to use iomapping could be given by adding the following
line to /boot/device.hints file.
hint.ste.0.prefer_iomap="1"
PR: kern/149285
MFC after: 5 days
suspend state. Also disable master clock after PHY power down,
this is supposed to save more power. The master clock should be
enabled if WOL is active.
and BeOS. The devices supported by uslcom(4) are now in sync with:
NetBSD src/sys/dev/usb/uslsa.c 1.11
OpenBSD src/sys/dev/usb/uslcom.c 1.20
Linux source/drivers/usb/serial/cp210x.c from kernel 2.6.35
BeOS usb_serial/driver.c 1.32
Two vendor/product IDs from Linux have not been added to uslcom(4):
SILABS SAEL - This device has special code in u3g to support it
SILABS GSM2228 - I suspect this should also be covered by u3g(4).
MFC after: 1 week
vendor ID in the vendor section, and by symbolic name in the product
section. Products are sorted by product ID. While here, get rid of a
duplicate Microsoft Mouse entry, revealed by sorting.
MFC after: 1 week
value resulted in poor performance for UDP packets. With this
change, UDP bulk transfer performance is more than 940Mbps.
While I'm here fix a wrong register definition.
bus_generic_resume() since the pci_link(4) driver was added.
- Change the ACPI PCI-PCI bridge driver to inherit most of its methods
from the generic PCI-PCI bridge driver. In particular, this will now
restore PCI config registers for ACPI PCI-PCI bridges.
Tested by: Oleg Sharoyko osharoiko of gmail
infrastructure, not us. This appears to be a leftover from an older
version of the driver.
Submitted by: avg
Tested by: Anton Shterenlikht <mexas bristol.ac.uk>
MFC after: 1 week
X-MFC-Note: To stable/8 and stable/7 only
This way we would have an opportunity to hide the
Tj(target) value doesn't seem right stuff if we know
it's not working there.
Add temperature value for Core2 Duo Extreme Mobile that
I have access to.
Xeon 5500/5600 series:
- Utilize IA32_TEMPERATURE_TARGET, a.k.a. Tj(target) in place
of Tj(max) when a sane value is available, as documented
in Intel whitepaper "CPU Monitoring With DTS/PECI"; (By sane
value we mean 70C - 100C for now);
- Print the probe results when booting verbose;
- Replace cpu_mask with cpu_stepping;
- Use CPUID_* macros instead of rolling our own.
Approved by: rpaulo
MFC after: 1 month
a PMC. It was possible that we could have turned a bit on but
never cleared it.
Extend the calls to rdmsr() to all necessary functions, not
just those which previously caused a panic.
Pointed out by: jhb@
MFC after: 1 week
the official vendor listed for 0x076b, rather than Omnikey, as in the PR.
PR: usb/123351
Submitted by: Marcin Cieslak <saper SYSTEM.PL>
MFC after: 1 week
This patch is different to that provided in the PR, due to the changes in
this driver since 7.x.
PR: usb/129945
Submitted by: Antonio Hilario <avahilario gmail.com>
MFC after: 1 week
- Bring in several other devices from OpenBSD while here. Use the
official manufacturer name over the OpenBSD name in the case of
GEMALTO. Reorder list slightly to aid future syncing.
- Remove duplicate SILABS CP2102 define from usbdevs
PR: usb/131912 [1]
Submitted by: Jack Twilley <mathuin gmail.com> [1]
MFC after: 1 week
plug. Note that the Vendor ID 0x04b4 is officially assigned to Cypress,
so use that instead of adding a second vendor with an identical ID, in the
same way other similar cases are treated in usb/usbdevs.
PR: usb/132785
Submitted by: Dirk-Willem van Gulik <dirkx webweaving.org>
MFC after: 1 week
10G cards. 1G cards are x4 only.
- Use constants from pcireg.h for reading the current link width.
- Use pci_set_max_read_req() rather than implementing it by hand.
Reviewed by: np
MFC after: 1 week
This is similar to a fix in r189305 but for earlier ICH versions (<= 5).
Reported by: someone via attilio
Discussed with: des, attilio
MFC after: 1 week
tail pointers of the tx and rx queues. We needed a SYSCTL_PROC
to correctly get the values at run time.
Submitted by: Andrew Boyer aboyer at averesystems.com
MFC after: 1 week
This version adds support for ARC1880; additionally this version fixed
an issue where all devices on a SAS port gets offlined when any device
failed on the port [1].
Many thanks to Areca for continuing to support FreeBSD.
PR: kern/148502 [1]
Submitted by: Ching-Lung Huang <ching2048 areca com tw>
Obtained from: Areca
Tested by: Rich Ercolani <rercola acm jhu edu> [1]
MFC after: 2 weeks
lengths. Make MI wrapper code to validate periods in request. Make kernel
clock management code to honor these hardware limitations while choosing hz,
stathz and profhz values.
- Fixed the interface probe routine to only attach to USB interfaces the driver
actually supports. This allows other drivers to attach to things like
MicroSD slots etc.
- Fixed network interface enumeration to be globally sequential instead of
relying on the USB interface numbers. This make sure the first network
interface always is at uhso0 and the second at usho1 and so on.
- Added a radio kill switch; exposed through sysctl.
- Updated the manual page to be verbose about the number of serial ports and
include iCON 452 in the set of tested hardware.
Submitted by: Fredrik Lindberg
calls. Also add BUS_DMA_COHERENT flag to bus_dmamem_alloc(9) to
take advantage of efficient synchronization for architectures that
support that feature.
Reviewed by: davidch
return code. If context was not setup correctly give up
initialization. While I'm here move variable declarations to the
beginning of the function.
Reviewed by: davidch
AcpiOsMapMemory()/AcpiOsUnmapMemory() (-> pmap_mapbios()/pmap_unmapbios())
for AcpiOsReadMemory() and AcpiOsWriteMemory(). Although they do not sound
too obvious, these functions are exclusively used to access memory mapped
IO in ACPICA.
According to ACPICA User Guide and Programmer Reference, the read data must
be zero extended to fill the 64-bit return value even if the bit width of
the location is less than 64.
- Return error when 64-bit access is requested as we do not support 64-bit
PCI register access (yet). XXX We may have to split it up into two 32-bit
accesses if it is really required.
According to ACPICA User Guide and Programmer Reference, the read data must
be zero extended to fill the 32-bit return value even if the bit width of
the port is less than 32.
- Remove 64-bit read/write from AcpiOsReadMemory() and AcpiOsWriteMemory().
These functions do not support 64-bit access (yet). Clean up style nits
and unnecessary bit masking while I am here.
Reported by: Liu, Jinsong (jinsong dot liu at intel dot com) via
Lin Ming (ming dot m dot lin at intel dot com) [1]
- The 6000 series WiMAX devices need a separate firmware.
- The b-gen devices are not hooked because the hardware revision type
is not know.
Obtained from: OpenBSD
MFC after: 1 week
r165114 added that code and that change ignored the same logic
committed in r135772. In addition, data FIFO protection should be
selectively enabled instead of applying to all PCIe devices.
While I'm here add BCM5785 to devices that do not require this
fix.
and remove a buffer overflow:
- Remove the array of per-type dispatch functions. Instead, pass each
structure to a single callback. The callback should check the type of
each table entry to take appropriate action. This matches the behavior
of other table walkers such as for the MP Table and MADT.
- Don't attempt to save an array of string pointers for each structure
entry. Instead, just skip the strings. If this code is reused to
provide a generic SMBIOS table walker in the future we could provide
a method that looks up a specific string N for a given structure record
instead of pre-populating an array of pointers. This fixes a buffer
overflow for structure entries with more than 20 strings.
PR: kern/148546
Reported by: Spencer Minear @ McAfee
MFC after: 3 days
The code in question verifies that all register write operations only change
bits that are defined (in the register definition file) for that effected
register. The bug effectively disabled this checking.
o Fix the check by testing the opcode against all supported read ("and" based)
operands.
o Add missing bit definitions to the aic7xxx and aic79xx register definition
files so that the warning (treated as a fatal error) does not spuriously
fire.
Reported by: Pawel Worach <pawel.worach@gmail.com>
MFC after: 1 week
All of the necessary wrmsr calls are now preceded by a rdmsr
and we leave the reserved bits alone.
Document the bits in the relevant registers for future reference.
Tested by: mdf
MFC after: 1 week
was missed in r209599.
Reported and tested by: Michael Moll
- Declare mpt_dma_buf_alloc() static just like mpt_dma_buf_free(), both are
used in mpt.c only.
Reviewed by: ken
MFC after: r209599
a packet has only a header in the first mbuf, the
checksum code will dereference a pointer into the
non-existing IP header. Do a check for the size and
pullup if needed. Thanks to Michael Tuexen for this
fix.
MFC: asap - should be in 8.1 IMHO
Do not grab lock while setting up interrupt, as it causes LOR with
allocation code. Instead make interrupt handler check that CAM bus
initialization completed before touching it.
While there, slightly improve attach errors handling.
Reported by: kib
The following systems are affected:
- MPC8555CDS
- MPC8572DS
This overhaul covers the following major changes:
- All integrated peripherals drivers for Freescale MPC85XX SoC, which are
currently in the FreeBSD source tree are reworked and adjusted so they
derive config data out of the device tree blob (instead of hard coded /
tabelarized values).
- This includes: LBC, PCI / PCI-Express, I2C, DS1553, OpenPIC, TSEC, SEC,
QUICC, UART, CFI.
- Thanks to the common FDT infrastrucutre (fdtbus, simplebus) we retire
ocpbus(4) driver, which was based on hard-coded config data.
Note that world for these platforms has to be built WITH_FDT.
Reviewed by: imp
Sponsored by: The FreeBSD Foundation
start so we should adjust the mbuf if the driver is running in PIO mode.
Now it should work well with WPA authentication and association for LP
PHY devices.
Tested by: Warren Block <wblock at wonkity.com>
MFC after: 1 month
checksum offloading is enabled. The frame has a valid checksum
value so payload might be modified during TX checksum calculation.
Disable TX checksum offloading but give users chance to enable it
when they know their controller works without problems with TX
checksum offloading.
Reported by: Andrzej Tobola <ato <> iem dot pw dot edu dot pl>
- Run the adapter's tick at 1Hz and remove link state checks from it.
Instead, have each port check its link state. Delay the check so that
it takes place slightly after the driver is notified of a change in
link state. This is a cheap way to debounce these notifications if
many are received in rapid succession. POLL_LINK_1ST_TIME flag can
also be eliminated as a side effect of these changes.
- Do not reset the PHY when link goes down.
- Clear port's link_fault flag if the PHY indicates link is down.
- get_link_status_r should leave speed and duplex alone when link is down.
MFC after: 1 month
checksum is enabled in sge_init_locked().
While I'm here do not set RX checksum bits in RX descriptor
initialization. It is controller's job to set these bits.
Tested by: xclin <xclin <> cs dot nctu dot edu dot tw >
configuration to get IPv4 TSO work on BCM57780. While I'm here
apply the same fix to BCM5785 which shares similar hardware feature
of BCM57780. This change makes TSO work on BCM57780.
Tested by: Tong Liu <nemoliu <> gmail dot com>
it. This can happen in some cases when plugging in SD/SmartCard PC
Cards with empty slots. It is better to detect this bogosity, and
refuse to attach rather than panic with a division by zero (in one of
many places) down stream.
the core changes but left out the shared code, lol.
Well, and a couple fixes to the core... hopefully
this will all be complete now.
Happy happy joy joy :)
What this provides is support for the 'virtual function'
interface that a FreeBSD VM may be assigned from a host
like KVM on Linux, or newer versions of Xen with such
support.
When the guest is set up with the capability, a special
limited function 82576 PCI device is present in its virtual
PCI space, so with this driver installed in the guest that
device will be detected and function nearly like the bare
metal, as it were.
The interface is only allowed a single queue in this configuration
however initial performance tests have looked very good.
Enjoy!!
limit the advertised speed of an SFP+ to 1G, effectively
"forcing" link at that lower speed. It is off by default
and is enabled by sysctl dev.ix.0.force_gig=1, 0 will
set it back to the norm.
The mpt driver previously didn't report a 'maxio' size to CAM, and so the
da(4) driver limited I/O sizes to DFLTPHYS (64K) by default. The number
of scatter gather segments allowed, as reported to busdma, was
(128K / PAGE_SIZE) + 1, or 33 on architectures with 4K pages.
Change things around so that we wait until we've determined how many
segments the adapter can support before creating the busdma tag used for
buffers, so we can potentially support more S/G segments and therefore
larger I/O sizes.
Also, fix some things that were broken about the module unload path. It
still gets hung up inside CAM, though.
mpt.c: Move some busdma initialization calls in here, and call
them just after we've gotten the IOCFacts, and know how
many S/G segments this adapter can support.
mpt.h: Get rid of MPT_MAXPHYS, it is no longer used.
Add max_cam_seg_cnt, which is used to report our maximum
I/O size up to CAM.
mpt_cam.c: Use max_cam_seg_cnt to report our maximum I/O size to CAM.
Fix the locking in mpt_cam_detach().
mpt_pci.c: Pull some busdma initialization and teardown out and put
it in mpt.c. We now delay it until we know many scatter
gather segments the adapter can support, and therefore
how to setup our busdma tags.
mpt_raid.c: Make sure we wake up the right wait channel to get the
raid thread to wake up when we're trying to shut it down.
Reviewed by: gibbs, mjacob
MFC after: 2 weeks
This prevents a kernel fault by dividing with zero because the initial
rate was 0 and didn't be initialized.
Tested by: Warren Block <wblock at wonkity.com>
MFC after: 3 days
changed to RUN because ic->ic_newassoc isn't set anywhere now. In the
previous bwi_newassoc() is used to initialize AMRR rate routines.
Tested by: Warren Block <wblock at wonkity.com>
MFC after: 3 days
It has more features than acpi_aiboost(4) and it will eventually replace
acpi_aiboost(4).
Submitted by: Constantine A. Murenin <cnst at FreeBSD.org>
Reviewed by: freebsd-acpi, imp
MFC after: 1 month
FPU registers for copying. Remove the switch table and jumps from
bcopy/bzero/... to the actual implementation.
As a side-effect, i486-optimized bzero is removed.
Reviewed by: bde
Tested by: pho (previous version)
properly short terminate their transfers. This fixes a problem where input
appears several seconds late.
Reported by: Alexander Yerenkow
Submitted by: Hans Petter Selasky
HPET to steal IRQ0 from i8254 and IRQ8 from RTC timers. It can be suitable
for HPETs without FSB interrupts support, as it gives them two unshared
IRQs. It allows them to provide one per-CPU event timer on dual-CPU system,
that should be suitable for further tickless kernels.
To enable it, such lines may be added to /boot/loader.conf:
hint.atrtc.0.clock=0
hint.attimer.0.clock=0
hint.hpet.0.legacy_route=1
writing event timer drivers, for choosing best possible drivers by machine
independent code and for operating them to supply kernel with hardclock(),
statclock() and profclock() events in unified fashion on various hardware.
Infrastructure provides support for both per-CPU (independent for every CPU
core) and global timers in periodic and one-shot modes. MI management code
at this moment uses only periodic mode, but one-shot mode use planned for
later, as part of tickless kernel project.
For this moment infrastructure used on i386 and amd64 architectures. Other
archs are welcome to follow, while their current operation should not be
affected.
This patch updates existing drivers (i8254, RTC and LAPIC) for the new
order, and adds event timers support into the HPET driver. These drivers
have different capabilities:
LAPIC - per-CPU timer, supports periodic and one-shot operation, may
freeze in C3 state, calibrated on first use, so may be not exactly precise.
HPET - depending on hardware can work as per-CPU or global, supports
periodic and one-shot operation, usually provides several event timers.
i8254 - global, limited to periodic mode, because same hardware used also
as time counter.
RTC - global, supports only periodic mode, set of frequencies in Hz
limited by powers of 2.
Depending on hardware capabilities, drivers preferred in following orders,
either LAPIC, HPETs, i8254, RTC or HPETs, LAPIC, i8254, RTC.
User may explicitly specify wanted timers via loader tunables or sysctls:
kern.eventtimer.timer1 and kern.eventtimer.timer2.
If requested driver is unavailable or unoperational, system will try to
replace it. If no more timers available or "NONE" specified for second,
system will operate using only one timer, multiplying it's frequency by few
times and uing respective dividers to honor hz, stathz and profhz values,
set during initial setup.
measured interval as upper bound. It should be more precise then just
assuming hz/2. For idle CPU it should be quite precise, for busy - not
worse then before.
state lower than the lowest one supported by the current CPU. This closes
some races with changes to the hw.acpi.cpu_cx_lowest sysctl while Cx
states for individual CPUs were changing (e.g. unplugging the AC adapter
of a laptop) that could result in panics.
Submitted by: Giovanni Trematerra
Tested by: David Demelier demelier dot david of gmail
MFC after: 3 days
Although the sysctls are marked with CTLFLAG_RD and the values will stay
immutable, current sysctl implementation stores value pointer in
void* type, which means that const qualifier is discarded anyway
and some newer compilers complaint about that.
We can't use de-const trick in sysctl implementation, because in that
case we could miss an opposite situation where a const value is used
with CTLFLAG_RW sysctl.
Complaint from: gcc 4.4, clang
MFC after: 2 weeks
beginning with the highest available rate. Currently we always use
54m for the first retry no matter what AMRR has choosen. Fix this
by setting the index to the next lower rate.
Approved by: rpaulo (mentor)
Tested by: Brandon Gooch <jamesbrandongooch at gmail.com>
MFC after: 2 weeks
callback function will be executed, and that the key won't be deleted during
the init process.
- txmic and rxmic are written into the chip the same place regardless of
opmode.
- Make the hardware generate 802.11 sequence numbers.
Submitted by: Akinori Furukoshi
Obtained from: git://gitorious.org/run/run.git
The following systems are involved:
- DB-88F5182
- DB-88F5281
- DB-88F6281
- DB-78100
- SheevaPlug
This overhaul covers the following major changes:
- All integrated peripherals drivers for Marvell ARM SoC, which are
currently in the FreeBSD source tree are reworked and adjusted so they
derive config data out of the device tree blob (instead of hard coded /
tabelarized values).
- Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say
good by to obio / mbus drivers and numerous hard-coded config data.
Note that world needs to be built WITH_FDT for the affected platforms.
Reviewed by: imp
Sponsored by: The FreeBSD Foundation.
The T3 ASIC can provide an incoming packet's timestamp instead of its RSS hash.
The timestamp is just a counter running off the card's clock. With a 175MHz
clock an increment represents ~5.7ns and the 32 bit value wraps around in ~25s.
# sysctl -d dev.cxgbc.0.pkt_timestamp
dev.cxgbc.0.pkt_timestamp: provide packet timestamp instead of connection hash
# sysctl -d dev.cxgbc.0.core_clock
dev.cxgbc.0.core_clock: core clock frequency (in KHz)
# sysctl dev.cxgbc.0.core_clock
dev.cxgbc.0.core_clock: 175000
Remove unneeded rxtx handler, make que handler generic.
Do not allocate header mbufs in rx ring if not doing hdr split.
Release the lock in rxeof call to stack.
MFC for 8.1 asap
via %s
Most of the cases looked harmless, but this is done for the sake of
correctness. In one case it even allowed to drop an intermediate buffer.
Found by: clang
MFC after: 2 week
support FreeBSD.
1) Timeout ioctl command timeouts.
Do not reset the controller if ioctl command completed
successfully.
2) Remove G66_WORKAROUND code (this bug never shipped).
3) Remove unnecessary interrupt lock (intr_lock).
4) Timeout firmware handshake for PChip reset (don't wait forever).
5) Handle interrupts inline.
6) Unmask command interrupt ONLY when adding a command to the pending
queue.
7) Mask command interrupt ONLY after removing the last command from
the pending queue.
8) Remove TW_OSLI_DEFERRED_INTR_USED code.
9) Replace controller "state" with separate data fields to avoid races:
TW_CLI_CTLR_STATE_ACTIVE ctlr->active
TW_CLI_CTLR_STATE_INTR_ENABLED ctlr->interrupts_enabled
TW_CLI_CTLR_STATE_INTERNAL_REQ_BUSY ctlr->internal_req_busy
TW_CLI_CTLR_STATE_GET_MORE_AENS ctlr->get_more_aens
TW_CLI_CTLR_STATE_RESET_IN_PROGRESS ctlr->reset_in_progress
TW_CLI_CTLR_STATE_RESET_PHASE1_IN_PROGRESS ctlr->reset_phase1_in_progress
10) Fix "req" leak in twa_action() when simq is frozen and req is NOT
null.
11) Replace softc "state" with separate data fields to avoid races:
TW_OSLI_CTLR_STATE_OPEN sc->open
TW_OSLI_CTLR_STATE_SIMQ_FROZEN sc->simq_frozen
12) Fix reference to TW_OSLI_REQ_FLAGS_IN_PROGRESS in
tw_osl_complete_passthru()
13) Use correct CAM status values.
Change CAM_REQ_CMP_ERR to CAM_REQ_INVALID.
Remove use of CAM_RELEASE_SIMQ for physical data addresses.
14) Do not freeze/ release the simq with non I/O commands.
When it is appropriate to temporarily freeze the simq with an I/O
command use:
xpt_freeze_simq(sim, 1);
ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
otherwise use:
xpt_freeze_simq(sim, 1);
xpt_release_simq(sim, 1);
Submitted by: Tom Couch <tom.couch lsi.com>
PR: kern/147695
MFC after: 3 days
- Re-enable TSO. This was broken previously due to CSUM_TSO clearing the
CSUM_TCP flag, so our checksum flags were incorrectly set going to the
netback driver. That was fixed in r206844 in tcp_output.c, so we can
turn TSO back on here.
- Fix the way transmit slots are calculated, so that we can't overfill
the ring.
- Avoid sending packets with more fragments/segments than netback can
handle. The Linux netback code can only handle packets of
MAX_SKB_FRAGS, which turns out to be 18 on machines with 4K pages. We
can easily generate packets with 32 or so fragments with TSO turned on.
Right now the solution is just to drop the packets (since netback
doesn't seem to handle it gracefully), but we should come up with a way
to allow a driver to tell the TCP stack the maximum number of fragments
it can handle in a single packet.
- Fix the way the consumer is tracked in the receive path. It could get
out of sync fairly easily.
- Use standard Xen ring macros to make it clearer how netfront is using
the rings.
- Get rid of Linux-ish negative errno return values.
- Added more documentation to the driver.
- Refactored code to make it easier to read.
- Some other minor fixes.
Reviewed by: gibbs
Reviewed by: gibbs
Sponsored by: Spectra Logic
MFC after: 7 days
corruption bug where if an ATA command is issued before DMA is started,
data will become available to the controller before it knows what to do
with it. This results in either data corruption or a controller crash.
This patch remedies the problem by adopting the workaround employed
by Linux and Darwin: starting the DMA engine prior to sending the ATA
command.
Observer on: Xserve G5
Reviewed by: mav
MFC after: 1 week
buffers it should also reinitialize RX descriptors otherwise some
stale data could be passed to controller. This could end up with
mbuf double free or unexpected NULL pointer dereference in upper
stack. To fix the issue, save loaded buffer's length and
reinitialize RX descriptors with the saved value whenever bge(4)
reuses the loaded RX buffers.
While I'm here, increase the number of RX buffers to 512 from 256.
This simplifies RX buffer handling as well as giving more RX
buffers. Controller supports just fixed number of RX buffers
(i.e. 512) and bge(4) used to rely on hope that our CPU is fast
enough to keep up with the controller. With this change, bge(4)
will use 1MB for RX buffers but I don't think it would cause
problems in these days.
Reported by: marcel
Tested by: marcel
fix. On Apple OpenPICs, the low/high bit of the interrupt sense is only
respected for interrupt 0. We currently erroneously program all OpenPIC
interrupts level high instead of level low by default, which only matters
for some G5 systems where the SATA controllers use IRQ 0.
This change is a quick fix that will be reverted once the effect of
changing the default interrupt sense on embedded systems is known.
MFC after: 3 days
context from in-kernel execution of padlock instructions and to handle
spurious FPUDNA exceptions that sometime are raised when doing padlock
calculations.
Globally mark crypto(9) kthread as using FPU.
Reviewed by: pjd
Hardware provided by: Sentex Communications
Tested by: pho
PR: amd64/135014
MFC after: 1 month
I don't know why- but it occurred to me in looking at the second sleep
is that all I want is a pause- not an actual sleep. So do that instead.
MFC after: 2 weeks
doing bidirectional stress traffic on 82598.
Also a couple bug fixes from Michael Tuexen, thank you!!
Add a workaround into the header so that 8 REL can use
the driver (adds local copy of ALTQ fix).
MFC: in a few days
o fdtbus(4) - the main abstract bus driver for all FDT-compliant systems. This
is a direct replacement for the many incompatible bus drivers grouping
integrated peripherals on embedded platforms (like obio(4), ocpbus(4) etc.)
o simplebus(4) - bus driver representing ePAPR style 'simple-bus' node, which
is an umbrella device for most of the integrated peripherals on a typical
system-on-chip device.
o Other components (common routines library, PCI node processing helper
functions)
Reviewed by: imp
Sponsored by: The FreeBSD Foundation
I removed too many lines and a wrong pointer was accidentally passed down.
Tested by: Scott Allendorf (scott-allendorf at uiowa dot edu), kib
MFC after: 3 days
o Let OFW_INIT() and OF_init() return status value.
o Provide helper routines for 'compatible' property handling.
o Only compile OF and OFW code, which is relevant in FDT scenario.
o Other minor cosmetics
Reviewed by: imp
Sponsored by: The FreeBSD Foundation
whole bus (XPT_SCAN_BUS) and a single lun on that bus (XPT_SCAN_LUN).
It's less resource comsumptive than scanning a whole bus when the
caller knows only one target has changes.
Reviewed by: scsi@
Sponsored by: Panasas
MFC after: 1 month
The driver is stub. It just creates device entry and feeds
reassembled packets from hardware into it.
If in future we would port wsmouse(4) from NetBSD, or make
sysmouse(4) to support absolute motion events, then the driver
can be extended to act as system mouse. Meanwhile, it just
presents a /dev/uep0, that can be utilized by X driver, that
I am going to commit to ports tree soon.
The name for the driver is chosen to be the same as in NetBSD,
however, due to different USB stacks this driver isn't a port.
Make sure not to requeue freed mbuf in sge_start_locked(). This
should fix NULL pointer dereference panic.
Reported by: Nikolay Denev <ndenev <> gmail dot com>
Submitted by: jhb
device, make sure we have no real HPET device entry with same ID.
As side effect, it potentially allows several HPETs to be attached.
Use first of them for timecounting, rest (if ever present) could later
be used as event sources.
hook it up to ada(4) also. While at it, rename *ad_firmware_geom_adjust()
to *ata_disk_firmware_geom_adjust() etc now that these are no longer
limited to ad(4).
Reviewed by: mav
MFC after: 3 days
When not defining header split do not allocate mbufs,
this can be a BIG savings in the mbuf memory pool.
Also keep seperate dma maps for the header and
payload pieces when doing header split. The basis
of this code was a patch done a while ago by
yongari, thank you :)
A number of white space changes.
MFC: in a few days
free(9) and it can cause kernel panic when there are multiple graphics
controllers in the system.
Tested by: Brandon Gooch (jamesbrandongooch at gmail dot com)
MFC after: 3 days
firmware in order to take over control of the SMU. Without doing this,
the firmware background process doing fan control will run amok as we
take over the system and crash the management chip.
This is limited to these two machines because our kernel is heavily
dependent on firmware accesses, and so quiescing firmware can cause
nasty problems.
Powermac G5 systems. MSI and several other things are not presently
supported.
The U3/U4 internal device support portions of this change were contributed
by Andreas Tobler.
MFC after: 1 week
so ni_txrate returned 0 which is a invalid result.
- The fourth argument of ieee80211_ratectl_tx_complete() could be not
NULL.
Reported by: Gustau P?rez <gperez at entel.upc.edu>
Tested by: Gustau P?rez <gperez at entel.upc.edu>,
Ian FREISLICH <ianf at clue.co.za>
MFC after: 3 days
- add a moderation value to the Link vector
- allow disabling HW RSC on the 82599 if LRO
is not enabled.
- correct error in the stats code
- change optic type on the 82598 DA device
Thanks to Andrew Boyer for the changes.
RFA. Also drop frames that have either CRC error or alignment
error. Normally bad frames are not received at all. But controllers
running in promiscuous mode will receive bad frames. 82557 will
also receive bad frames to receive VLAN oversized frames.
While I'm here mark RNR condition if driver happen to see RNR in
RFA status and restart RU to receive frames again. Because driver
checks all received frames in RX loop, RNR condition could be set
in the middle of RX processing. Just relying on RNR interrupt was
not enough.
This change fixes "Memory modified after free" issue when fxp(4)
is running as a member of if_bridge(4).
Tested by: Larry Baird <lab <> gta dot com>
MFC after: 5 days
microframe slot was not in the smask. The problem was that the EHCI driver was
then thinking that the transfer was immediately complete in some cases. Which
could lead to freeze-like situations, which can be recovered by unplugging the
USB device.
Reported by: Richard Kolkovich
Submitted by: Hans Petter Selasky
USB enumeration lock is locked, then the USB stack fails to resume the device
because locking the USB enumeration lock is part of the resume procedure. To
solve this issue a new lock is introduced which only protects the suspend and
resume callbacks, which can be dropped inside the usbd_do_request_flags()
function, to allow suspend and resume during so-called enumeration operations.
Submitted by: Hans Petter Selasky
hardware tag insertion/stripping. Remove conditional code that
disables these hardware features on SiS190. Also nuke RX fixup code
which is no more required on strict-alignment architectures because
SiS190 supports RX 10 bytes padding.
Now all hardware features except jumbo frame and WOL are supported.
Thanks to Masa Murayama who confirmed SiS190 also has the same
hardware features of SiS191.
I guess the only difference between SiS191 and SiS190 would be
jumbo frame support. It will be implemented in near future.
fragmentation of mbuf chain to 32 from 16 because TSO can send 64KB
sized packet which in turn requires long list of mbuf chain. Due to
lack of documentation, I'm not sure whether driver have to pull up
ethernet/IP/TCP header with options to make controller work but
driver have to parse TCP header to update pseudo TCP checksum
anyway. The controller expects pseudo TCP checksum computed by
upper stack and the checksum should follow the MS NDIS
specification to make TSO work.
Tested by: xclin <xclin <> cs dot nctu dot edu dot tw >
fxp(4) already used to extract most hardware MAC statistics but it
didn't show them. With this change, all MAC statistics counters
are exported. Because there are a couple of new counters for 82558
and 82559, enable extended MAC statistics functionality to get
these counters. Accoring to public data sheet, 82559 MAC statistics
return 24 DWORD counters(3 counters are unknown at this moment) so
increase MAC counter structure to meet the MAC statistics block size.
The completion of MAC counter dump is now checked against
FXP_STATS_DR_COMPLETE status code which is appended at the end of
status block. Previously fxp(4) ignored the status of the
FXP_SCB_COMMAND_CU_DUMPRESET command. fxp(4) does not wait for the
completion of pending command before issuing
FXP_SCB_COMMAND_CU_DUMPRESET. Instead it skips the command and try
it next time. This scheme may show better performance but there is
chance to loose updated counters after stopping controller. So make
sure to update MAC statistics in fxp_stop().
While I'm here move sysctl node creation to fxp_sysctl_node().
Tested by: Larry Baird < lab <> gta dot com >
table. The default size of the configuration table was 22 bytes. To
use extended feature of 82550/82551 the configuration table size
was expanded to 32 bytes. The added configuration for 82550/82551
specifies VLAN hardware tagging and IPSec configuration as well as
TCO.
To make configuration easier fxp(4) used a configuration template
and the template was copied to configuration table. After that,
some parameters of the configuration table was changed depending on
controller type and operation mode. However the size of template
was 22 bytes so some configuration parameters were not properly
initialized on 82550/82551.
Fix this by increasing the template size. For 82557, 82558 and
82559 the size of the configuration is still 22 bytes.
unicast and the other for multicast. To receive multicast frames
that host didn't join in promiscuous mode, driver have to set
promiscuous mode for multicast frames as well.
The Open Source Software Developer Manual for i8255x was not clear
how to handle promiscuous mode.
PR: kern/145905
MFC after: 5 days
from passive to active scans. Basicly disable it by increasing the
amount packets to be received to an amount which can't be reached
during dwell times.
Approved by: rpaulo (mentor)
MFC after: 3 days
L2/3/4 headers and can drop or steer packets as instructed. Filtering
based on src ip, dst ip, src port, dst port, 802.1q, udp/tcp, and mac
addr is possible. Add support in cxgbtool to program these filters.
Some simple examples:
Drop all tcp/80 traffic coming from the subnet specified.
# cxgbtool cxgb2 filter 0 sip 192.168.1.0/24 dport 80 type tcp action drop
Steer all incoming UDP traffic to qset 0.
# cxgbtool cxgb2 filter 1 type udp queue 0 action pass
Steer all tcp traffic from 192.168.1.1 to qset 1.
# cxgbtool cxgb2 filter 2 sip 192.168.1.1 type tcp queue 1 action pass
Drop fragments.
# cxgbtool cxgb2 filter 3 type frag action drop
List all filters.
# cxgbtool cxgb2 filter list
index SIP DIP sport dport VLAN PRI P/MAC type Q
0 192.168.1.0/24 0.0.0.0 * 80 0 0/1 */* tcp -
1 0.0.0.0/0 0.0.0.0 * * 0 0/1 */* udp 0
2 192.168.1.1/32 0.0.0.0 * * 0 0/1 */* tcp 1
3 0.0.0.0/0 0.0.0.0 * * 0 0/1 */* frag -
16367 0.0.0.0/0 0.0.0.0 * * 0 0/1 */* * *
MFC after: 2 weeks
is no more need to defragment mbufs. After transmitting the
multi-fragmented frame, the controller updates only the first
descriptor of multi-descriptor transmission so it's driver's
responsibility to clear OWN bits of remaining descriptor of
multi-descriptor transmission. It seems the controller behaves much
like jme(4) controllers in descriptor handling.
Tested by: xclin <xclin <> cs dot nctu dot edu dot tw >
received frames. Also check driver has valid ifp pointer before
calling msk_stop() in device_shutdown handler. While I'm here
remove unnecessary accesses to interrupt mask registers in
device_shutdown handler because driver puts the controller into
reset state.
With these changes, msk(4) now survive from heavy RX traffic(1byte
UDP frame) while reboot is in progress.
Reported by: Mark Atkinson < atkin901 <> gmail dot com >
by zero of the second argument 'from'.
- Prefer u_int32_t over unsigned int to make its intention more clearer.
- Move the function to a header file and make it a static inline function.
Pointed out by: Andrew Reilly (areilly at bigpond dot net dot au)[1]
MFC after: 3 days
on Cassini using the external PCS SERDES otherwise unaligned access
traps and other strange effects happen with some machines. Don't touch
the MIF which is unused in that case either. These changes require the
PHY type to use to be determined via the OFW device tree or from the
VPD in machines without the former.
- Disable the SERDES pins of Saturn when not used in order to save power
and ensure they are enabled otherwise.
- In cas_attach() use the correct register offset for CAS_PCS_CONF_EN.
- Add some bus space barriers missing in the PCS code path.
These changes make the Sun GigaSwift Ethernet 1.0 MMF cards as well as
the on-board interfaces found in Sun Fire B100s Blade Server work.
PR: 144867
scope of the object lock in agp_i810.c. (In this specific case, the scope
of the object lock shouldn't matter, but I don't want to create a bad
example that might be copied to a case where it did matter.)
Reviewed by: kib
queue length. The default value for this parameter is 50, which is
quite low for many of today's uses and the only way to modify this
parameter right now is to edit if_var.h file. Also add read-only
sysctl with the same name, so that it's possible to retrieve the
current value.
MFC after: 1 month
driver for CAM ATA subsystem. This driver supports same hardware as
atamarvell, ataadaptec and atamvsata drivers from ata(4), but provides
many additional features, such as NCQ, PMP, etc.
- device initiated power management (some devices support only this way);
- Automatic Partial to Slumber Transition (more power saving);
- DMA auto-activation (expected to slightly improve performance).
More features could be added later, when hardware supports.
This bug would cause allocating sample-mode PMCs to fail with ENOMEM after allocating several counting-mode PMCs.
Approved by: jkoshy (mentor)
MFC after: 2 weeks
that generates a fatal bus trap. Normally, the chips are setup to do
128 byte DMA bursts, but when on this CPU, they can only safely due
4-byte DMA bursts due to this bug. Details of the exact nature of the
bug are sketchy, but some can be found at
https://forum.openwrt.org/viewtopic.php?pid=70060 on pages 4, 5 and 6.
There's a small performance penalty associated with this workaround,
so it is only enabled when needed on the Atheros AR71xx platforms.
Unfortunately, this condition is impossible to detect at runtime
without MIPS specific ifdefs. Rather than cast an overly-broad net
like Linux/OpenWRT dues (which enables this workaround all the time on
MIPS32 platforms), we put this option in the kernel for just the
affected machines. Sam didn't like this aspect of the patch when he
reviewed it, and I'd love to hear sane proposals on how to fix it :)
Reviewed by: sam@
does. Without this change, Yukon Extreme seems to generate lots of
RX FIFO overruns even though controller has available RX buffers.
These excessive RX FIFO overruns generated lots of pause frames
which in turn killed devices plugged into switch. It seems there is
still occasional RX frame corruption on Yukon Extreme but this
change seems to fix the pause frame storm.
Reported by: jhb
Tested by: jhb
MFC after: 5 days
- Print device details only when verbose boot is enabled.
- Add debug output for shared memory access.
- Add debug statistics (checksum offload & VLAN frame counters).
- Modify TX path to update consumer index for each frame completed
rather than updating the consumer index only once for a group of
frames to improve small packet performance.
- Print driver/firmware pulse messages only when verbose boot
is enabled.
- Add debug sysctl to clear statistics.
- Fix more style(9) violations.
MFC after: 2 weeks
architecture from page queue lock to a hashed array of page locks
(based on a patch by Jeff Roberson), I've implemented page lock
support in the MI code and have only moved vm_page's hold_count
out from under page queue mutex to page lock. This changes
pmap_extract_and_hold on all pmaps.
Supported by: Bitgravity Inc.
Discussed with: alc, jeffr, and kib
controller, I'm not sure whether this is also applicable to SiS190
so this feature is only activated on SiS191 controller.
In theory, controller reinitialization is not needed when VLAN tag
configuration is changed, but xclin said controller was not stable
whenever toggling VLAN tag bit. To address that, sge(4)
reinitialize controller for VLAN configuration which seems to work
as expected. VLAN tag information for TX/RX descriptor and
configure bit of RxMacControl register was found by xclin.
Submitted by: xclin <xclin <> cs dot nctu dot edu dot tw > (initial version)
Tested by: xclin <xclin <> cs dot nctu dot edu dot tw >
register. Due to lack of SiS190 controller, I'm not sure whether
this is also applicable to SiS190 so this feature is only activated
on SiS191 controller.
The controller can pad 10 bytes before DMAing a received frame to
RX buffer and received bytes include the padded bytes. This padding
is very useful on strict-alignment architectures because driver
does not have to copy received frame to align IP header on 4 bytes
boundary. It also gives better RX performance on non-strict
alignment architectures. Special thanks to xclin to give me
valuable register information. Without his enthusiastic trial and
errors this wouldn't be even possible.
While I'm here tighten validity check of received frame. Controller
clears RDS_CRCOK bit when it received bad CRC frames. xclin found
that using loop back testing.
Tested by: xclin <xclin <> cs dot nctu dot edu dot tw >
programs RX filter configuration. It seems RX MAC control register
is one of key registers to get various offloading features as well
as performance. Blindly clearing unrelated bits can result in
unexpected results.
Tested by: xclin <xclin <> cs dot nctu dot edu dot tw >
emulated by BIOS using SMI interrupt. On those chipsets reading
from the status port may be thousand times slower than usually.
Sometimes this emilation is not working properly resulting in
commands timing out and since we assume that inb() operation
takes very little time to complete we need to adjust number of
retries to keep waiting time within a designed limits (100ms).
Measure time it takes to make read_status() call and adjust
number of retries accordingly.
To keep it simple, use TSC to measure inb() performance and
keep it to amd64-only, since TSC may not available on older
CPUs.
Also enable detection of the AT controller absence on amd64.
Reviewed by: jhb
MFC after: 1 month
back in rxeof (I could see little point in taking it out),
and now release it before the stack entry.
Also, make it so the 82574 does not configure for multiqueue
when its not used in the stack.
On top of that, LLVM+Clang mis-compiles this code because of its register
allocator bug.
Analyzed by: Andrew Reilly (areilly at bigpond dot net dot au)
Reviewed by: ariff, rdivacky
MFC after: 3 days
In the end, it does help fixing /dev/io usage from multithreaded
processes.
- On i386 and amd64 the old behaviour is kept but multithreaded
processes must use the new interface in order to work well.
- Support for the other architectures is greatly improved, where
necessary, by the necessity to define very small things now.
Manpage update will happen shortly.
Sponsored by: Sandvine Incorporated
PR: threads/116181
Reviewed by: emaste, marcel
MFC after: 3 weeks
Open Firmware device tree in order to match what the PROM built-in
driver uses. This is especially important when netbooting Fujitsu
Siemens PRIMEPOWER250 as in that case the built-in driver isn't used
and the port facts PortSCSIID defaults to 0, conflicting with the
disk at the same address.
first descriptor in TSO case. Otherwise controller can generate bad
frames during TSO. To address it, make sure to pull up ethernet +
IP + TCP header with options in first buffer. Also ensure the
buffer length of the first descriptor for TSO covers entire ethernet
+ IP + TCP with options and setup additional Tx descriptor if the
first buffer includes TCP payload.
Tested by: Amar Takhar <verm <> darkbeer dot org >
MFC after: 1 week
Some of these cases should be safe in a non-atomic fashion, however
since all of the driver ioctls are locked, a lot of work is required to
fix it correctly. Just don't sleep now.
MFC after: 2 weeks
was chosen by lots of trial and errors. The chosen value shows
good interrupt moderation without additional latency.
Without this change, controller can generate more than 140k
interrupts per second under high network load.
Submitted by: xclin <xclin <> cs dot nctu dot edu dot tw >
This time, abandon the use of busdma and start interacting with the VM
system directly. Make use of the new kmem_alloc_attr() which allows us
to easily allocate non-contiguous pages to back the GART table. This
should help a lot when starting or restarting X after the system has
been running for a while and memory has become fragmented.
MFC after: 2 weeks
* On 32 bit platforms we steal the upper 4 bits of the map handle
to store a unique map id.
* On 64 bit platforms we steal the upper 24 bits.
Resolves issues where the offsets that are handed to mmap may overlap the VRAM on some cards.
Tested on: radeon, intel, mga, and via.
This will break nouveau. I will spin new patches shortly.
proper device_t so it faked the devctl event to appear like one, this is now a
notify which allows more information to be passed.
We notify for both the device attach/detach and for each usb interface. A devd
rule can now match on the interface properties, including composite devices
which may have a uvideo interface and also usound and possibly uhid too.
An example to match a umass device with a scsi subclass and BBB protocol would be
notify 100 {
match "system" "USB";
match "subsystem" "INTERFACE";
match "type" "ATTACH";
match "intclass" "0x08";
match "intsubclass" "0x06";
match "intprotocol" "0x50";
action ...
};
The old attach devctl event has been retained for the moment to make merging to
8.1 easier. This was never compatible with 7.x or earlier due to the ugen regex
change needed.
Reviewed by: warner
MFC after: 1 week
occurs. In addition, the delay when programming the short cable fix
should be 100us, not 100ms.
PR: kern/64556
Submitted by: Thomas Hurst <tom at hur.st>
Approved by: rrs (mentor)
MFC after: 1 week
no flowid is present, this was causing some bad
reordering, now just use 0.
Also, add a few watchdog bits, and tx handler bits
that were corrected in igb.
- Re-probe xfp / sfp+ socket on link events, in case user
has changed transceiver
- correctly report current media to avoid confusing lagg (reported by Panasas)
- Report link speed (submitted by yongari)
Reviewed by: yongari (earlier version)
MFC after: 7 days
This driver was written by Alexander Pohoyda and greatly enhanced
by Nikolay Denev. I don't have these hardwares but this driver was
tested by Nikolay Denev and xclin.
Because SiS didn't release data sheet for this controller, programming
information came from Linux driver and OpenSolaris. Unlike other open
source driver for SiS190/191, sge(4) takes full advantage of TX/RX
checksum offloading and does not require additional copy operation in
RX handler.
The controller seems to have advanced offloading features like VLAN
hardware tag insertion/stripping, TCP segmentation offload(TSO) as
well as jumbo frame support but these features are not available
yet. Special thanks to xclin <xclin<> cs dot nctu dot edu dot tw>
who sent fix for receiving VLAN oversized frames.
unneeded for legacy hardware.
Also remove some TSO related cruft.
Add some watchdog_time setting that was missing, thanks
to Mikolaj Golub for pointing that out.
* WPA-None requires ap_scan=2:
The major difference between ap_scan=1 (default) and 2 is, that no
IEEE80211_IOC_SCAN* ioctls/functions are called, though, there is a
dependency on those. For example the call to wpa_driver_bsd_scan()
sets the interface UP, this never happens, therefore the interface
must be marked up in wpa_driver_bsd_associate(). IEEE80211_IOC_SSID
also is not called, which means that the SSID has not been set prior
to the IEEE80211_MLME_ASSOC call.
* WPA-None has no support for sequence number updates, it doesn't make
sense to check for replay violations..
* I had some crashes right after the switch to RUN state, issue is
that sc->sc_lastrs was not yet defined.
Approved by: rpaulo (mentor)
MFC after: 3 weeks
StarCat systems which provides time-of-day services for both as well as
console service for Serengeti, i.e. Sun Fire V1280. While the latter is
described with a device type of serial in the OFW device tree, it isn't
actually an UART. Nevertheless the console service is handled by uart(4)
as this allowed to re-use quite a bit of MD and MI code. Actually, this
idea is stolen from Linux which interfaces the sun4v hypervisor console
with the Linux counterpart of uart(4).
set, it make sense to actually initialize that array. This fixes some
issues with 4965 adapters where the TX power is crucial.
This got lost somewhere while merging with the OpenBSD code.
Approved by: rpaulo (mentor)
Obtained from: OpenBSD
MFC after: 2 weeks
* Enable DC calibration and crystal calibration on Centrino Advanced-N
6250 parts.
* Workaround for a HW bug (does not affect 4965AGN) that may sporadically
affect latency under some rare circumstances. From a similar commit to
iwlwifi.
* Update sensitivity settings for 5000 series to workaround a performance
bug in the DSP (1000 is not affected so we keep the old values for 5000).
* Update sensitivity settings for 6000 series.
* Set differential gains on 6250 too (but use a 1.0 factor, not 1.5).
* Init OFDM sensitivity with min value (which depends on the chip)
instead of hardcoding it to 90.
* Read calibration version from ROM and set IWN_GP_DRIVER_CALIB_VER6
bit on 6x50 if version >= 6.
Approved by: rpaulo (mentor)
Obtained from: OpenBSD
MFC after: 2 weeks
- code flow in handler could let interrupt be
reenabled when not wanted.
- change where the RX lock is taken to improve
performance.
- adapter->msix is true for MSI systems also,
it needs to explicitly test for 82574, good one :)
- add CRC stripping to the RX side, this was handled
by some obscure code in rxeof previously, its easier
to simply have the hardware strip it now.
- Add back an ALTQ change that slipped between the cracks
- Add an update to the watchdog_time in the xmit code, not
doing this in ixgbe caused problems, think its needed here
as well.
VLAN HWFILTER from being used by default, this breaks
stacked pseudo devices, and as it turns out, also breaks
virtual machines that happen to use VLANS (didn't know that
before :). Put the fix back into the em driver, and for good
measure add the same code to the igb driver where it should
have been anyway.
Just relying on status LE ownership of status block seems to cause
poor performance. Always read current status index register first
and then check status ownership as we had before. Accessing status
index register seems to trigger immediate status update if
controller have pending status updates.
MFC after: 1 week
Reported by: Andre Albsmeier <Andre.Albsmeier <> siemens dot com>
Tested by: Andre Albsmeier <Andre.Albsmeier <> siemens dot com>
This framework allows drivers to abstract the rate control algorithm and
just feed the framework with the usable parameters. The rate control
framework will now deal with passing the parameters to the selected
algorithm. Right now we have AMRR (the default) and RSSADAPT but there's
no way to select one with ifconfig, yet.
The objective is to have more rate control algorithms in the net80211
stack so all drivers[0] can use it. Ideally, we'll have the well-known
sample rate control algorithm in the net80211 at some point so all
drivers can use it (not just ath).
[0] all drivers that do rate control in software, that is.
Reviewed by: bschmidt, thompsa, weyongo
MFC after: 1 months
- Added some new debug helper routines to systcl.
- Fixed many of the style(9) violations that have crept into the code
due to my use of a "smart" editor.
MFC after: 2 weeks
set to sane values as they no longer default to 0, otherwise some OFW
implementation might copy in or out arguments not based on what the actual
function takes but what ever stack garbage nargs and nreturns supply.
Reviewed by: nwhitehorn
domain clock, 8 programmable PMC.
- Westmere based CPU (Xeon 5600, Corei7 980X) support.
- New man pages with events list for core and uncore.
- Updated Corei7 events with Intel 253669-033US December 2009 doc.
There is some removed events in the documentation, they have been
kept in the code but documented in the man page as obsolete.
- Offcore response events can be setup with rsp token.
Sponsored by: NETASQ
volumes were incorrectly calculated.
I've tested this with one of my es1370 cards and I can confirm that it
works.
PR: 98167
Submitted by: Joseph Terner <jtsn@gmx.de>
Approved by: kib
change the argument type to igb_rxeof() to the
correct type. Note, any users of POLLING must
be sure and set the number of queues to 1 for
things to work correctly.
- Only the tunnelq (TXQ_ETH) requires a buf_ring, an ifq, and the watchdog/timer
callouts. Do not allocate these for the other tx queues.
- Use 16k jumbo clusters only on offload capable cards by default.
- Do not allocate a full tx ring for the offload queue if the card is not
offload capable.
- Slightly better freelist size calculation.
- Fix nmbjumbo4 typo, remove unneeded global variables.
MFC after: 3 days
also for finding a one character bug that kept TSO from working.
Sometimes with direct attach cables a failure can occur in init,
the old method of calling detach was broken, there is no way to
return an error to the system from init, so I have changed it to
return failure thru the ioctl.
And, have fixed the ALTQ code changes of Max Laier, sorry Max :)
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
- add some new hardware support for 82599
- Big change to interrupt architecture, it now
uses a queue which contains an RX/TX pair as
the recipient of the interrupt. This will reduce
overall system interrupts/msix usage.
- Improved RX mbuf handling: the old get_buf routine
is no longer synchronized with rxeof, this allows
the elimination of packet discards due to mbuf
allocation failure.
- Much simplified and improved AIM code, it now
happens in the queue interrupt context and takes
into account both the traffic on the RX AND TX
side.
- variety of small tweaks, like ring size, that have
been seen as performance improvements.
- Thanks to those that provided feedback or suggested
changes, I hope I've caught all of them.
on debug output. Add a new platform function requirement to allow
for printing based upon the ITL nexus instead of the isp unit plus
channel, target and lun. This allows some printouts and error messages
from the core code to appear in the same format as the platform's
subsystem (in FreeBSD's case, CAM path).
MFC after: 1 week
First, we compare mode table data against minimum value. If the mode table
does not make sense, we set the minimum in the mode info. When we actually
set the mode, we try VESA BIOS function and compare it against the previous
value. If it makes more sense, update the information.
Andrew Turner. The kernel supports the LN2410SBC evaluation board,
and likely others. These parts (or similar ones) are in some open
hardware designs for phones.
Submitted by: Andrew Turner
- Don't leak slice resources when mxge_alloc_rings() fails
- Start taskq threads only after we know attach will succeed. At
boot time, taskqueue_terminate() will loop infinately, waiting
for the threads to exit, and hang the system.
Submitted by: Panasas
MFC After: 3 days
Untangle some of the confusion about what role means when it's in the FCPARAM/SDPARAM
or isp_fc/isp_spi structures. This fixed a problem about seeing targets appear if you've
turned off autologin and find them, or rather don't, via camcontrol rescan.
MFC after: 1 month
configuration space on Yukon Ultra(88E8056) such that accesses to
these registers were NOPs which in turn make msk(4) instable on
this controller. Use indirect access method to access
PCI_OUR_REG_[1-5] registers. This should fix a long standing
instability bug which prevented msk(4) working on Yukon Ultra.
Special thanks to koitsu who gave me remote access to his system.
PR: kern/114631, kern/116853
MFC after: 1 week
arcconf tool by Adaptec already seems to use for identifying the
Serial Number of the devices.
Some simple things (like FIB setup and bound checks) are retrieved
from the Adaptec's driver, but this implementation is quite different
because it does use the normal buffer dmat area for loading segments
and not a special one (like the Adaptec's one does).
Sponsored by: Sandvine Incorporated
Discussed with: emaste, scottl
Reviewed by: emaste, scottl
MFC: 2 weeks
have the delayed function take an argument as to the offset
to the SCTP header. This allows it to work for V4 and V6.
This of course means changing all callers of the function
to either pass the header len, if they have it, or create
it (ip_hl << 2 or sizeof(ip6_hdr)).
PR: 144529
MFC after: 2 weeks
Yukon FE and Yukon Ultra2. These controllers provide very simple
checksum computation mechanism and it requires additional pseudo
header checksum computation in upper stack. Even though I couldn't
see much performance difference with/without Rx checksum offloading
it may help notebook based controllers.
Actually controller can compute two checksum value by giving
different starting position of checksum computation on received
frame. However, for long time, Marvell's checksum offloading engine
have been known to have several silicon bugs so don't blindly trust
computed partial checksum value. Instead, compute partial checksum
twice by giving the same checksum computation position and compare
the result. If the value is different it's clear indication of
hardware bug. This configuration lose IP checksum offloading
capability but I think it's better to take safe route.
Note, Rx checksum offloading for Yukon XL was still disabled due to
known silicon bug.
index of status block is read first before acknowledging the
interrupts. Otherwise bge(4) may get stale status block as
acknowledging an interrupt may yield another status block update.
Reviewed by: marius
is issued at the beginning of the initial IN/OUT data transfers. Reason
unknown, probably firmware fault. Now the stall is only cleared on data
transfer errors.
PR: usb/144199
Submitted by: Hans Petter Selasky
other modules can generate USB descriptors.
- extend the vendor specific request function by one length pointer argument,
because not all descriptors store the length in the first byte. For example
HID descriptors.
Submitted by: Hans Petter Selasky
Also disable relaxed ordering as recommended by data sheet for
PCI-X devices. For PCI-X BCM5704, set maximum outstanding split
transactions to 0 as indicated by data sheet.
For BCM5703 in PCI-X mode, DMA read watermark should be less than
or equal to maximum read byte count configuration. Enforce this
limitation in DMA read watermark configuration.
chip revision often found in the blades and resulting in interfaces
not sensing carrier signal. Looking at all problem reports it
appears that it only affects some very specific silicon revision
(ASIC (0x57081021); Rev (B2)) and version of the PHY that
supports 1000baseSX-FDX media only. Therefore, narrow the scope of
workaround to combination of that revision and media type. Given
that the first report on this issue is dated back to 2007, there is
not much hope that this issue will ever be properly resolved.
Among affected systems are IBM HS21, Intel SBXD132 and HP BL460c.
PR: 118238, 122551, 140970
MFC after: 1 month
are referenced directly from ivar pointer. It's to do like what other
buses do. [1]
o changes exported prototypes. It doesn't use struct siba_* structures
anymore that instead of it it uses only device_t.
o removes duplicate code and debug messages.
o style(9)
Pointed out by: imp [1]
Setting the new sysctl MIB "debug.acpi.enable_debug_objects" to a non-zero
value enables us to print Debug object when something is written to it.
- Allow users to disable interpreter slack mode. Setting the new tunable
"debug.acpi.interpreter_slack" to zero disables some workarounds for common
BIOS mistakes and enables strict ACPI implementations by the specification.
pmc_flush_logfile is now non-blocking and just ask the kernel
to shutdown the file. From that point, no more data is
accepted by the log thread and when the last buffer is flushed
the file is closed.
This will remove a deadlock between pmcstat asking for
flush while it cannot flush the pipe itself.
MFC after: 3 days
interface didn't be attached automatically at boot time so changes a
approach to attach children based on leveraging some newbus niceties.
Submitted by: nwhitehorn
- change the way in which command queue overflow is handled;
- do not expose to CAM two command slots, used for driver's internal purposes;
- allow driver to use up to 1024 command slots, instead of 256 before.
88E1149 PHY. This will fix intermittent watchdog timeouts as well
as very slow network performance on 88E8072 Yukon Extreme.
PR: kern/144148
MFC after: 1 week
o rename the new variables to comply with the naming scheme
o move the new variables to an AR5212 specific struct
o use ahp when available
o revert to previous ts_flags check
does not generate excessive interrupts any more so we don't need
to have two copies of interrupt handler.
While I'm here remove two STAT_PUT_IDX register accesses in LE
status event handler. After r204539 msk(4) always sync status LEs
so there is no need to resort to reading STAT_PUT_IDX register to
know the end of status LE processing. Just trust status LE's
ownership bit.
countdown timer register. The timer resolution may vary among
controllers but the value would be represented by core clock
cycles. msk(4) will automatically computes number of required clock
cycles from given micro-seconds unit.
The default interrupt holdoff timer value is 100us which will
ensure less than 10k interrupts under load. The timer value can be
changed with dev.mskc.0.int_holdoff sysctl node.
Note, the interrupt moderation is shared resource on dual-port
controllers so you can't use separate interrupt moderation value
for each port. This means we can't stop interrupt moderation in
driver stop routine. Also have msk_tick() reclaim transmitted Tx
buffers as safety belt. With this change there is no need to check
missing Tx completion interrupt in watchdog handler, so remove it.
full-duplex. Previously msk(4) used to allow flow-control on
1000baseT half-duplex media. Also GMAC pause is enabled if link
partner is capable of handling it.
While I'm here use IFM_OPTIONS instead of using IFM_GMASK to check
optional flags of link.
32 bit handles. The RIO (reduced interrupt operation) and fast posting
for the parallel SCSI cards were all 16 bit handles. Furthermore,
target mode parallel SCSI only can have 16 bit handles.
Use part of a supplied patch to switch over to using 32 bit handles.
Be a bit more conservative here and only do this for parallel SCSI
for the 12160 (Ultra3) cards. There were a lot of marginal Ultra2
cards, and, frankly, few are findable now for testing.
Fix the target handle routine to only do 16 bit handles for parallel
SCSI cards. This is okay because the upper sixteen bits of the new
32 bit handles is a sequence number to help protect against duplicate
completions. This would be very unlikely to happen with parallel
SCSI target mode, and wasn't present before, so we're no worse off
than we used to be.
While we're at it, finally split the async mailbox completion handlers
into FC and parallel SCSI functions. This makes it much cleaner and
easier to figure out what is or isn't a legal async mailbox completion
code for different card classes.
PR: kern/144250
Submitted partially by: Charles D
MFC after: 1 week
the issue. I still have no idea why TSO does not work on this
controller. davidch@ also confirmed there is no known TSO related
issues for this controller.
parsing code in TSO path as the controller requires VLAN hardware
tagging to make TSO work over VLANs.
While parsing the mbuf in TSO patch, always perform check for
writable mbuf as bce(4) have to reset IP length and IP checksum
field of IP header and make sure to ensure contiguous buffer before
accessing IP/TCP headers. While I'm here replace magic number 40 to
more readable sizeof(struct ip) + sizeof(struct tcphdr).
Reviewed by: davidch
TX/RX checksum handler to set/clear relavant assist bits which was
used to cause unexpected results.
With this change, bce(4) can be bridged with other interfaces that
lack TSO, VLAN checksum offloading.
Reviewed by: davidch
around. Management firmware(ASF/IPMI/UMP) requires the VLAN
hardware tag stripping so don't actually disable VLAN hardware tag
stripping. If VLAN hardware tag stripping was disabled, bce(4)
manually reconstruct VLAN frame by appending stripped VLAN tag.
Also remove unnecessary IFCAP_VLAN_MTU message.
Reviewed by: davidch
for controllers like 88E8053 which reports two MSI messages.
Because we don't get anything useful things with 2 MSI messages,
allocating 1 MSI message would be more sane approach.
While I'm here, enable MSI for dual-port controllers too. Because
status block is shared for dual-port controllers, I don't think
msk(4) will encounter problem for using MSI on dual-port
controllers.
The register offset is not valid on 88E8072 controller. Also don't
blindly increase max read request size to 4096, instead, use 2048
which seems to be more sane value and only change the value if the
hardware default size(512) was used on that register.
For PCIX controllers, use system defined constant rather than using
magic value.
While I'm here stop showing negotiated link width.
not require checksum LE configuration if checksum start and write
position is the same as before. So keep track last checksum start
and write position and insert new LE whenever the position is
changed. This reduces number of LEs used in TX path as well as
slightly enhance TX performance.
been around for a long time now (7.1-ish or even earlier); assume
they are present. These includes MSI, TSO, LRO, VLAN, INTR_FILTERS,
FIRMWARE, etc.
Also, eliminate some dead code and clean up in other places as part
of this quick once-over.
MFC after: 1 week
race as it could already have been tx'd and freed by that time. Place
the bpf tap just _before_ writing the gen bit.
This fixes a panic when running tcpdump on a cxgb interface.
- Add a separate palette data for 8-bit DAC mode when SC_PIXEL_MODE is set
and fill it up with default gray-scale palette data for text. Now we don't
have to set `hint.sc.0.vesa_mode' to get the default palette data.
- Add a new adapter flag, V_ADP_DAC8 to track whether the controller is
using 8-bit palette format and load correct palette when switching modes.
- Set 8-bit DAC mode only for non-VGA compatible graphics mode.
change and have isp_make_here scan the whole bus which will then scan all
luns.
I think xpt_rescan needs to be fixed, but that's a separable issue.
Suggested by: Alexander
not support TSO over VLAN if VLAN hardware tagging is disabled so
there is no need to check VLAN here.
While I'm here make sure to pullup IP/TCP headers in the first
buffer.
GEM_MIF_CONFIG_MDI0 cannot be trusted when the firmware has powered
down the chip so the internal transceiver has to be hardcoded. This
is also in line with the AppleGMACEthernet driver, which just doesn't
distinguish between internal/external transceiver and MDIO/MDI1
respectively in the first place. Tested by: Andreas Tobler
MFC after: 1 week
frame, make sure to update VLAN capabilities whenever jumbo frame
is configured.
While I'm here rearrange interface capabilities configuration. The
controller requires VLAN hardware tagging to make TSO work on VLANs
so explicitly check this requirement.
Tx DMA burst size 2048, I beleive PCIe maximum read request size
also should match to the value of Tx DMA burst size. With this
change I can get more than 800Mbps for TCP bulk transfers.
Previously I was not able to get more than 700Mbps. If I enable TSO
it now shows 927Mbps.
to make TSO work on VLAN. So if VLAN hardware tagging is disabled
explicitly clear TSO on VLAN. While I'm here remove duplicated
VLAN_CAPABILITIES call.
o uses v4 firmware instead of v3. A port will be committed to create
the bwn firmware module.
o supports B/G and LP(low power) PHYs.
o supports 32 / 64 bits DMA operations.
o tested on big / little endian machines so should work on all
architectures.
It'd not connected to the build until the firmware port is committed.
With FBS enabled, we have no idea what command caused timeout.
Implement same logic as in siis(4) - wait for other commands
complete or timeout and then give some more time.
- introduce drbr_needs_enqueue that returns whether the interface/br needs
an enqueue operation: returns true if altq is enabled or there are
already packets in the ring (as we need to maintain packet order)
- update all drbr consumers
- fix drbr_flush
- avoid using the driver queue (IFQ_DRV_*) in the altq case as the
multiqueue consumer does not provide enough protection, serialize altq
interaction with the main queue lock
- make drbr_dequeue_cond work with altq
Discussed with: kmacy, yongari, jfv
MFC after: 4 weeks
It is belived that that pass s not needed anymore.
Specifically it is not required now for the reasons that were given
in the removed comment.
Discussed with: jhb
MFC after: 4 weeks
Some current systems dynamically load SSDT(s) when _PDC/_OSC method
of Processor is evaluated. Other devices in ACPI namespace may access
objects defined in the dynamic SSDT. Drivers for such devices might
have to have a rather high priority, because of other dependencies.
Good example is acpi_ec driver for EC.
Thus we attach to Processors as early as possible to load the SSDTs
before any other drivers may try to evaluate control methods.
It also seems to be a natural order for a processor in a device
hierarchy.
On the other hand, some child devices on acpi cpu bus need to access
other system resources like PCI configuration space of chipset devices,
so they need to be probed and attached rather late.
For this reason we probe and attach the cpu bus at
SI_SUB_CONFIGURE:SI_ORDER_MIDDLE SYSINIT level.
In the future this could be done more elegantly via multipass.
Please note that acpi drivers that might access ACPI namespace from
device_identify will do that before _PDC/_OSC of Processors are evaluated.
Legacy cpu driver is not affected by this change.
PR: kern/142561 (in part)
Reviewed by: jhb
Silence from: acpi@
MFC after: 5 weeks
The softc obtained in device probe wouldn't be the same one used in
device attach. Drivers should not assume any values stored in softc
structure in probe routine will be available for its attach routine.
brightness, wired LAN power and bass gain), and update the description of
one previously unknown feature (display contrast). While here, expand on
a comment and remove two defines left over from an old version of the code.
Also update man page to document the above changes, and correct grammar.
PR: kern/127581
_PDC was deprecated in favor of _OSC long time ago, but it
seems that they still peacefully coexist and in some case
only _PDC is present.
Still _OSC provides a reacher interface and is capable to
report back its status.
If the status is non-zero, then report it, we may find
it useful to understand what firmware expects from OS.
Also clean up some comments that became less useful over time.
Reviewed by: njl, jhb, rpaulo
MFC after: 3 weeks
numbers and handle types in rational way. This will better protect from
(unwittingly) dealing with stale handles/commands.
Fix the watchdog timeout code to better protect itself from mistakes.
If we run an abort on a putatively timed out command, the command
may in fact get completed, so check to make sure the command we're
timing it out is still around. If the abort succeeds, btw, the command
should get returned via a different path.
TNT5004 IC. This involved a major rewrite of a number of things, as
this chip no longer supports the NAT7210 legacy mode but requires the
host to use the (more modern) FIFO mode.
In theory, this also ought to work on the older TNT4882C chip. I'll
probably add this as optional support (perhaps by a device.hints flag)
later on. By now, FIFO mode is *only* activates iff a TNT5004 chip
has been detected (where the old code didn't work at all), while
everything else is supposed to use the old code.
MFC after: 2 weeks
no effect. Make sure to clear error bits by writing 1. [1]
While I'm here use predefined value instead of hardcodig magic
vlaue.
Submitted by: msaitoh at NetBSD [1]
lagg and vlan the vlan attach/detach event is not being
handed down to em, this caused some init code not to run,
and thus VLANs did not work. Ultimately having the event
get propagated would be nice, but for now the solution is
to have HWFILTER off by default, when this is the case
VLANs will work, ifconfig can be used to turn it on and
then get HW tag filtering.
available today.
This card is a low power 802.11bgn that only does 11n rates up to MCS 7
(that's 65 Mbps in 20Mhz mode and 135 in 40Mhz mode).
802.11n is not yet supported, but will be in the future.
The driver still has a problem regarding to the setting of txpower on
the card, so don't expect good performance yet. After fixing this
problem, an MFC is possible.
Special thanks to iXsystems and S Smirnov <tonve at yandex.ru> for help
with the purchase of a netbook with this card.
Sponsored by: iXsystems, Inc.
- Unify bus reset/probe sequence. Whenever bus attached at boot or later,
CAM will automatically reset and scan it. It allows to remove duplicate
code from many drivers.
- Any bus, attached before CAM completed it's boot-time initialization,
will equally join to the process, delaying boot if needed.
- New kern.cam.boot_delay loader tunable should help controllers that
are still unable to register their buses in time (such as slow USB/
PCCard/ CardBus devices), by adding one more event to wait on boot.
- To allow synchronization between different CAM levels, concept of
requests priorities was extended. Priorities now split between several
"run levels". Device can be freezed at specified level, allowing higher
priority requests to pass. For example, no payload requests allowed,
until PMP driver enable port. ATA XPT negotiate transfer parameters,
periph driver configure caching and so on.
- Frozen requests are no more counted by request allocation scheduler.
It fixes deadlocks, when frozen low priority payload requests occupying
slots, required by higher levels to manage theit execution.
- Two last changes were holding proper ATA reinitialization and error
recovery implementation. Now it is done: SATA controllers and Port
Multipliers now implement automatic hot-plug and should correctly
recover from timeouts and bus resets.
- Improve SCSI error recovery for devices on buses without automatic sense
reporting, such as ATAPI or USB. For example, it allows CAM to wait, while
CD drive loads disk, instead of immediately return error status.
- Decapitalize diagnostic messages and make them more readable and sensible.
- Teach PMP driver to limit maximum speed on fan-out ports.
- Make boot wait for PMP scan completes, and make rescan more reliable.
- Fix pass driver, to return CCB to user level in case of error.
- Increase number of retries in cd driver, as device may return several UAs.
format is higher than 6-bit instead of relying VGA compatibility flag.
This fixes palette problem of NVIDIA GeForce 6600. Reduce code differences
between palette load/save functions while we are here.
Tested by: danfe
Also, account for a quirk of AMD/ATI HPET which reports number of timers
instead of id of the last timer as manadated by the specification.
Currently this has no effect on functionality but in the future we may
make actual use of the HPET timers, not only of its timecounter.
MFC after: 2 weeks
igb now has a queue notion that has a single interrupt
with an RX/TX pair, this will reduce the total interrupts
seen on a system. Both em and igb have a new watchdog
method. igb has fixes from Pyun Yong-Hyeon that have
improved stability, thank you :)
I wish to MFC this for 7.3 asap, please test if able.
Limit early revisions from 6Gb/s to 3Gb/s by default, or they negotiate
only 1.5Gbps, when 3Gb/s devices connected.
Add dummy driver for PATA part of these controllers, preventing generic
driver attach them. It causes system freeze when SATA controller used after
PATA was touched.
the intention of having two ttys pointing to the same cfe console device was.
Also we were not initializing the output[] array passed in as input to
tty_makedev() so one name of the ttys was garbage.
Fix the code that calls cfe_write() to deal with the case where only a partial
buffer is written out.
cfe_cngetc() needs to return if there is no character available as input.
If we don't do this then the cfe_timeout() function will spin forever
because cfe_cngetc() will only ever return if there is valid input.
Approved by: imp (mentor)
frontend uses the same uPD7210 backend as the pcii ISA frontend, so
the backend has to cope with both situations.
Also, hide the first printf in pcii_probe (address mismatch) behind
bootverbose as the ISA bus parent tries to probe all configured ISA
devices against each driver, so a the console has been cluttered with
this message for a bunch of unrelated driver probes.
MFC after: 3 days
. Properly allocate all IO space resources. These cards scatter their
IO addresses over a range of 0x1600 bytes, and they require an
additional address for "special interrupt handling".
. Implement the "special interrupt handling" per the GPIB-PCIIA
Technical Reference Manual; this was apparently not declared for the
clone card this driver has been originally implemented for, but it
turned out to be needed for both, an original NI brand PCII/PCIIA
card as well as the Axiom AX5488 clone.
. Add some diagnostic messages for various resource allocation etc.
failures during probe.
. Add some comments about the structure of the IO address space that
is used by these cards.
MFC after: 1 day
implementation of heartbeat interval was 2 but there was typo which
caused the heartbeat is sent approximately every 5 seconds. This
caused unintended controller reset by firmware because firmware
thought OS was crashed.
Submitted by: Floris Bos < info <> je-eigen-domein dot nl >
Tested by: Andrzej Tobola < ato <> iem dot pw dot edu dot pl >
loopback.
- Change the meaning of "mix" OSS control. Now it controls loopback level,
according to comments in soundcard.h.
- Allow AD1981HD codecs to use playback mixer. Now driver should be able to
really use it.
- Fix bug in shared muters operation.
frames to be accepted while the driver is resetting the hardware.
This failure is generally observed when broadcast frames are received
during driver load and will generate "Unable to write CTX memory"
errors.
- Small changes to driver flags display.
This is not only a prudent thing to do, but also makes sure that probe
method is not confused by non-NULL 'private', if the previous attach
attempt fails for any reason.
PR: kern/142561
Tested by: Alex Goncharov <alex-goncharov@comcast.net>
MFC after: 4 days
chains. This part of code is to enhance performance so failing the
collapsing should not free TX frames. Otherwise bge(4) will
unnecessarily drop frames which in turn can freeze the network
connection.
Reported by: Igor Sysoev (is <> rambler-co dot ru)
Tested by: Igor Sysoev (is <> rambler-co dot ru)
copper and fiber interfaces over GMII so an explicit check is
necessary to know whether it was configured for fiber interface.
This change make BCM5715S work.
Tested by: olli
MFC after: 1 week
over GMII, make sure to enable GMII. With this change brgphy(4) is
used to handle the dual mode PHY. Since we still don't have a sane
way to pass PHY specific information to mii(4) layer special
handling is needed in brgphy(4) to determine which mode of PHY was
configured in parent interface.
This change make BCM5715S work.
Tested by: olli
Obtained from: OpenBSD
MFC after: 1 week
o Don't enable BGE_FLAG_BER_BUG on both 5722 and 5756, and based
on their PCI IDs rather than their chip IDs.
Reported by: several PC-BSD users via kmoore
Reviewed by: yongari, imp, jhb, davidch
Sponsored by: iXsystems, Inc.
MFC after: 2 weeks
from standard 3G wireless units by supplying a raw IP/IPv6 endpoint rather than
using PPP over serial. uhsoctl(1) is used to initiate and close the WAN
connection.
Obtained from: Fredrik Lindberg <fli@shapeshifter.se>
as different nearby ones, and was grabbed by MIXER_xxx() handler.
While there, replace '(cmd & MIXER_xxx(0)) == MIXER_xxx(0)' expressions
with more correct '(cmd & ~0xff) == MIXER_READ(0)'. Use of bit operations
to compare numeric fields doesn't looks sane.
MFC after: 1 month
now due to unidentified synchonization problem. For 7.1 soundcards 5.1
support handled correctly via software upmix done by sound(4).
Stereo stream is no more duplicated to all ports. If you loose sound, check
you are using right connectors. Front speakers connector is usually green,
center/LFE - orange, rear - black, side - gray.
Pertinant highlights from Myricom CHANGES file include:
- Make sure invalid external smbus activity cannot affect performance
- Fix to avoid a bug where the link could sometimes stay reported as
up on after unplugging the cable.
- For 8B NIC, make smbus connection passive at init to avoid
possible address conflicts
- Increase number of slices to 17 for multi-slice fw
- Fix a bug where packets dropped because of link_overflow could
be occasionally reported as bad_crc32
- Add selectable failover strategy for dual-port chip: symmetric or primary/backup
- On failover, send RARP broadcast to make the change immediately
known to the network
- Change endianess for PCI Device Serial Number
- For dual-port NICs, time to failover is now a few microsecs
instead of a few millisecs.
MFC after: 3 days
I/O port access is implemented on Itanium by reading and writing to a
special region in memory. To hide details and avoid misaligned memory
accesses, a process did I/O port reads and writes by making a MD system
call. There's one fatal problem with this approach: unprivileged access
was not being prevented. /dev/io serves that purpose on amd64/i386, so
employ it on ia64 as well. Use an ioctl for doing the actual I/O and
remove the sysarch(2) interface.
Backward compatibility is not being considered. The sysarch(2) approach
was added to support X11, but support for FreeBSD/ia64 was never fully
implemented in X11. Thus, nothing gets broken that didn't need more work
to begin with.
MFC after: 1 week
register, nVidia chipsets have different oppinion, requiring every interrupt
to be acknowledged there.
While there, add interrupt descriptions in multi-vector MSI mode.
Pass the channel argument as a real argument and not through
RXON. The RXON version seems to have problem with both the older
228.57.2.23 firmware and the latest 228.61.2.24 version resulting
in device initialization errors like:
wpa_supplicant[2928]: Failed to initiate AP scan.
kernel: firmware error log:
kernel: error type = "SYSASSERT" (0x00000005)
kernel: program counter = 0x0000147C
kernel: source line = 0x0000058B
kernel: error data = 0x0000058B00000000
kernel: branch link = 0x0000145A00001492
kernel: interrupt link = 0x000006DE00000000
kernel: time = 7310
...
kernel: iwn0: iwn_config: could not set TX power
kernel: iwn0: iwn_init_locked: could not configure device, error 35
By passing the current channel to hal->set_txpower() the firmware
error is fixed, at least for the 4965 chipset of my Thinkpad and
the ones tested by Bernhard.
Submitted by: Bernhard Schmidt <bschmidt@techwires.net>
Approved by: rpaulo
warning message and attach without setting the Ethernet address to a
random address. It is not believed that this code can actually be
executed, and if it does, we're better off printing an error message than
faking up an Ethernet address.
PR: kern/133239
Reviewed by: yongari (earlier version of patch)
Approved by: ed (mentor)
EEPROM on ST201 always returns 16bits data with little endian
format so conversion to host order is required.
This change fixes inversed ethernet address on sparc64.
command in the usb_msctest routines, as well as a general tidyup.
This now properly ejects the ZTE MF636, Option Gi0322 and Novatel MC950D
devices I have on my desk.
pci_delete_child() function called by the cardbus driver. The new function
uses resource_list_unreserve() to release the BARs decoded by the device
being removed.
Reviewed by: imp
Tested by: brooks
This should fix some Thinkpad specific problems such as
connecting to a headphone jack is not functional on X41.
Reviewed by: takawata
MFC after: 1 week
same ASIC ID of BCM5758 such that r198318 incorecctly enabled TSO
on BCM5754.BCM5754M controllers. BCM5754/BCM5754M needs a special
firmware to enable TSO and bge(4) does not support firmware based
TSO.
Reported by: ed
Tested by: ed
If the NAA is type 2, the Node WWN is the Port WWN with the 12 bits
of port (48..60) cleared. This iff a wwn fetched from NVRAM is zero.
MFC after: 1 week
Unfortunately there are two slight problems with that:
- Yacc and lex might generate code that generates warnings because of
this. Require yacc and lex to be rebuilt during bootstrap. I'm not
incrementing __FreeBSD_version here, because I assume someone else
will do this eventually.
- When running `make buildkernel', it uses share/mk from the source
treeo to build aicasm. Because aicasm also depends on lex, this would
break. Lower WARNS to 5 for now. We should just increment it to 6
again somewhere in the very far future.
stored in a BAR since the CIS BAR is mapped before the PCI bus driver
enumerates all the BARs. Without this change, the PCI bus driver would
attempt to initialize a BAR that was already allocated resulting in a panic.
handling for the PCIR_BIOS decoding enable bit from the cardbus driver.
The PCIR_BIOS BAR does include type bits like other BARs. Instead, it is
always a 32-bit non-prefetchable memory BAR where the low bit is used as a
flag to enable decoding.
Reviewed by: imp
This replaces d_mmap() with the d_mmap2() implementation and also
changes the type of offset to vm_ooffset_t.
Purge d_mmap2().
All driver modules will need to be rebuilt since D_VERSION is also
bumped.
Reviewed by: jhb@
MFC after: Not in this lifetime...
get required command protocol. But they have no idea about new commands,
such as DATA SET MANAGEMENT (TRIM). As soon as this info any way provided
by CAM, give controller specific instructions.
* new firmware
* untested support for 1000 and 6000 series
* bgscan support
* remove unnecessary RXON changes
* allow setting of country/regdomain by enforcing channel flags read
from the EEPROM
* suspend/resume fixes
* RF kill switch fixes
* LED adjustments
* several bus_dma*() related fixes
* addressed some LORs
* many other bug fixes
Submitted by: Bernhard Schmidt <bschmidt at techwires.net>
Obtained from: Brandon Gooch <jamesbrandongooch at gmail dot com> (LED
related changes), Benjamin Kaduk <kaduk at mit dot edu>
(LOR fixes), OpenBSD
Fix some wrong usages.
Note: this does not affect generated binaries as this argument is not used.
PR: 137213
Submitted by: Eygene Ryabinkin (initial version)
MFC after: 1 month
blkif interface in Xen requires all I/O to be 512 byte aligned with each
segment bounded by a 4k page.
Note: This submission only documents the proper contraints for blkif I/O.
The alignment code in busdma does not yet handle alignment constraints
correctly in all cases.
* Correct a group of typos: for Core2 programmable events, check
user supplied umask values against the correct event descriptor
field.
Submitted by: Ryan Stone <rysto32 at gmail dot com>
Unlike TX interrupt, ST201 does not provide any mechanism to
suppress RX interrupts. ste(4) can generate more than 70k RX
interrupts under heavy RX traffics such that these excessive
interrupts make system useless to process other useful things.
Maybe this was the major reason why polling support code was
introduced to ste(4).
The STE_COUNTDOWN register provides a programmable counter that
will generate an interrupt upon its expiration. We program
STE_DMACTL register to use 3.2us clock rate to drive the counter
register. Whenever ste(4) serves RX interrupt, the driver rearm
the timer to expire after STE_IM_RX_TIMER_DEFAULT time and disables
further generation of RX interrupts. This trick seems to work well
and ste(4) generates less than 8k RX interrupts even under 64 bytes
UDP torture test. Combined with TX interrupts, the total number of
interrupts are less than 10k which looks reasonable on heavily
loaded controller.
The default RX interrupt moderation time is 150us. Users can change
the value at any time with dev.ste.%d.int_rx_mod sysctl node.
Setting it 0 effectively disables the RX interrupt moderation
feature. Now we have both TX/RX interrupt moderation code so remove
loop of interrupt handler which resulted in sub-optimal performance
as well as more register accesses.
This brings hwpmc(4) support for 2nd and 3rd generation XScale cores.
Right now it's enabled by default to make sure we test this a bit.
When the time comes it can be disabled by default.
Tested on Gateworks boards.
A man page is coming.
Obtained from: //depot/user/rpaulo/xscalepmc/...
transmitted frames. So request interrupt for every 16th frames. Due
to the limitation of hardware we can't suppress the interrupt as
driver should have to check TX status register. The TX status
register can store up to 31 TX status so driver can't send more
than 31 frames without reading TX status register.
With this change controller would not generate TX completion
interrupt for every frame, so reclaim transmitted frames in
ste_tick().
used to return success without respect to the result.
While I'm here use mii_mediachg() in ste_init_locked which allows
driver to use currently configured media. ste_ifmedia_upd() is
supposed to be called whenever user changes current media settings.
o Let RX filter handler program promiscuous/multicast filter as
well as broadcasting.
o Remove unnecessary register access.
o Simplify ioctl handler and have set_rxfilter to handle
IFF_PROMISC and IFF_ALLMULTI change instead of directly
programming the controller.
o Removed unnecessary error variable reinitialization in ioctl
handler.
o Add IFF_DRV_RUNNING check before programming multicast filter.
o Configure maximum allowed frame length before enabling MAC.
Datasheet didn't say the exact ordering of programming sequence
but it looks more natural to set maximum allowed frame length
first prior to enabling controller.
1ms. Since we switched to memory register mapping make sure to
flush PCI posted write by reading the register again.
While I'm here add additional delays in loop while driver waits the
completion of the reset.
If ste(4) encounter TX underrun or excessive collisions the TX MAC
of controller is stalled so driver should wake it up again. TX
underrun requires increasing TX threshold value to minimize
further TX underruns. Previously ste(4) used to reset controller
to recover from TX underrun, excessive collision and reclaiming
error. However datasheet says only TX underrun requires resetting
entire controller. So implement ste_restart_tx() that restarts TX
MAC and do not perform full reset except TX underrun case.
Now ste(4) uses CSR_READ_2 instead of CSR_READ_1 to read
STE_TX_STATUS register. This way ste(4) will also read frame id
value and we can write the same value back to STE_TX_FRAMEID
register instead of overwriting it to 0. The datasheet was wrong
in write back of STE_TX_STATUS so add some comments why we do so.
Also always invoke ste_txeoc() after ste_txeof() in ste_poll as
without reading TX status register can stall TX MAC.
is that the JBus to EBus bridges share the interrupt controller of a
sibling JBus to PCIe bridge (at least as far as the OFW device tree
is concerned, in reality they are part of the same chip) so we have to
probe and attach the latter first. That happens to be also the case
due to the fact that the JBus to PCIe bridges appear first in the OFW
device tree but it doesn't hurt to ensure the right order.
receiving incoming traffics, try harder to gracefully stop active
DMA cycles and then stop MACs. This is the way what datasheet
recommends and seems to work reliably. Resetting controller while
active DMAs are in progress is bad thing as we can't predict how
DMAs touche allocated TX/RX buffers. This change ensures controller
stop state before attempting to release allocated TX/RX buffers.
Also update MAC statistics which could have been updated during the
wait time of MAC stop.
While I'm here remove unnecessary controller resets in various
location. ste(4) no longer relies on hard controller reset to stop
controller and resetting controller also clears all configured
settings which makes it hard to implement WOL in near future.
Now resetting a controller is performed in ste_init_locked().
interrupt. If we want to use link state change interrupt ste(4)
should also implement auto-negotiation complete handler as well as
various PHY access handling. Now link state change is handled by
mii(4) polling so it will automatically update link state UP/DOWN
events which in turn make ste(4) usable with lagg(4).
r199559 added a private timer to drive watchdog and the timer also
used to drive MAC statistics update. Because the MAC statistics
update is called whenever statistics counter reaches near-full, it
drove watchdog timer too fast such that it caused false watchdog
timeouts under heavy TX traffic conditions.
Fix the regression by separating ste_stats_update() from driving
watchdog timer and introduce a new function ste_tick() that handles
periodic job such as driving watchdog, MAC statistics update and
link state check etc.
While I'm here clear armed watchdog timer in ste_stop().
link state and PHY related information.
Remove ste_link and ste_one_phy variable of softc as it's not used
anymore.
While I'm here add IFF_DRV_RUNNING check in ste_start_locked().
o Sorted includes and added missing header files.
o Added basic endianness support. In theory ste(4) should work on
any architectures.
o Remove the use of contigmalloc(9), contigfree(9) and vtophys(9).
o Added 8 byte alignment limitation of TX/RX descriptor.
o Added 1 byte alignment requirement for TX/RX buffers.
o ste(4) controllers does not support DAC. Limit DMA address space
to be within 32bit address.
o Added spare DMA map to gracefully recover from DMA map failure.
o Removed dead code for checking STE_RXSTAT_DMADONE bit. The bit
was already checked in each iteration of loop so it can't be true.
o Added second argument count to ste_rxeof(). It is used to limit
number of iterations done in RX handler. ATM polling is the only
consumer.
o Removed ste_rxeoc() which was added to address RX stuck issue
(cvs rev 1.66). Unlike TX descriptors, ST201 supports chaining
descriptors to form a ring for RX descriptors. If RX descriptor
chaining is not supported it's possible for controller to stop
receiving incoming frames once controller pass the end of RX
descriptor which in turn requires driver post new RX
descriptors to receive more frames. For TX descriptors which
does not support chaning, we exactly do manual chaining in
driver by concatenating new descriptors to the end of previous
TX chain.
Maybe the workaround was borrowed from other drivers that does
not support RX descriptor chaining, which is not valid for ST201
controllers. I still have no idea how this address RX stuck
issue and I can't reproduce the RX stuck issue on DFE-550TX
controller.
o Removed hw.ste_rxsyncs sysctl as the workaround was removed.
o TX/RX side bus_dmamap_load_mbuf_sg(9) support.
o Reimplemented optimized ste_encap().
o Simplified TX logic of ste_start_locked().
o Added comments for TFD/RFD requirements.
o Increased number of RX descriptors to 128 from 64. 128 gave much
better performance than 64 under high network loads.
the leading underscores since they are now implemented.
- Implement the tcpi_rto and tcpi_last_data_recv fields in the tcp_info
structure.
Reviewed by: rwatson
MFC after: 2 weeks
This device only appears on the ACPI bus, so isn't caught by the current
entry for it in the uart(4) ISA attachment.
PR: kern/140172
Reviewed by: jhb, marcel
Approved by: ed (mentor)
MFC after: 2 weeks
causes additional MSIs messages sent if several ports asked for attention
same time. Time window before clearing is not important, as these interrupts
are level triggered by interrupt source.
* Read the pci capability register to identify AGP 3 support
* Add missing smaller aperture sizes for AGP3 chips.
* Fix the aperture size calculation on AGP2 chips.
All sizes between 32M and 256M reported as 256M.
* Add \n to error string.
This all seems to get the CLE266 EPIA-M board agp working properly, now
back to work on drm.
MFC after: 2 weeks
Quite contrary to VT6130 datasheet which says it supports up to 8K
jumbo frame, VT6130 does not seem to send jumbo frame that is
larger than 4K in length. Trying to send a frame that is larger
than 4K cause TX MAC hang.
Even though it's possible to allow 4K jumbo frame for VT6130, I
think it's meaningless to allow 4K jumbo frame. I'm not sure VT6132
also has the same limitation but I guess it uses the same MAC of
VT6130.
controller will split the jumbo frame into multiple RX buffers.
However it seems the hardware always dma the frame to 8 bytes
boundary for the split frames. Only the first part of the fragment
can have 4 byte alignment and subsequent buffers should be 8 bytes
aligned. Change RX buffer the alignment requirement to 8 bytes from
4 bytes.
This tunable allows one to enable (1) or disable (0) gestures like tap
and tap-hold on Synaptics TouchPad when the Extended mode isn't enabled
(ie. "hw.psm.synaptics_support" not set).
By default, the value is -1 in order to keep the current behaviour of
not enabling/disabling gestures explicitly.
PR: kern/139272
Submitted by: David Horn <dhorn2000 AT gmail DOT com>
Reviewed by: David Horn <dhorn2000 AT gmail DOT com>
value is obtained by dividing it by 256, not by 2550; also,
one second is 10^9 nanoseconds, not 1800000000 nanoseconds.
- Due to rounding error, setting watchdog to a really small
timeout (<1 sec) was turning the watchdog off. It should
set the watchdog to a small timeout instead.
- Implemented error checking in ipmi_wd_event(), as required
by watchdog(9).
PR: kern/130512
Submitted by: Dmitrij Tejblum
- Additionally, check that the timeout value is within the
supported range, and if it's too large, act as required by
watchdog(9).
MFC after: 3 days
perform a function such as ejecting a 3G autoinstaller disk. The eventhandler
system properly tracks threads and is safe to unload, remove the
setting/clearing of a function pointer in the kernel by u3g(4) which included a
tsleep for safety.
controllers. TX/RX interrupt mitigation is controlled by
VGE_TXSUPPTHR and VGE_RXSUPPTHR register. These registers suppress
generation of interrupts until the programmed frames counter equals
to the registers. VT61xx also supports interrupt hold off timer
register. If this interrupt hold off timer is active all interrupts
would be disabled until the timer reaches to 0. The timer value is
reloaded whenever VGE_ISR register written. The timer resolution is
about 20us.
Previously vge(4) used single shot timer to reduce Tx completion
interrupts. This required VGE_CRS1 register access in Tx
start/completion handler to rearm new timeout value and it did not
show satisfactory result(more than 50k interrupts under load). Rx
interrupts was not moderated at all such that vge(4) used to
generate too many interrupts which in turn made polling(4) better
approach under high network load.
This change activates all interrupt moderation mechanism and
initial values were tuned to generate interrupt less than 8k per
second. That number of interrupts wouldn't add additional packet
latencies compared to polling(4). These interrupt parameters could
be changed with sysctl.
dev.vge.%d.int_holdoff
dev.vge.%d.rx_coal_pkt
dev.vge.%d.tx_coal_pkt
Interface has be brought down and up again before change take
effect.
With interrupt moderation there is no more need to loop in
interrupt handler. This loop always added one more register access.
While I'm here remove dead code which tried to implement subset of
interrupt moderation.
ethernet controller was recognized. VIA consistently calls
"Velocity" family for gigabit ethernet controllers. For fast
ethernet controllers they uses "Rhine" family(vr(4) controllers))
and vr(4) already shows "Rhine" in probe message.
tagged frames so add checksum offloading capabilities. Also add
missing VLAN hardware tagging control in ioctl handler and let
upper stack know current VLAN capabilities.
This is SMBus controller found in Intel Platform Controller Hub (PCH),
which is a general name that refers to Intel 5 Series chipsets and
3400 Series chipsets.
Submitted by: Dmitry S. Luhtionov <mitya@cabletv.dp.ua>
MFC after: 3 days
after ether_ifattach(), as ether_ifattach() initializes it with
ETHER_HDR_LEN.
While I'm here remove setting if_mtu, it's already handled in
ether_ifattach().
called and vge(4) used to drive auto-negotiation timer(mii_tick) in
vge_tick(). Therefore the mii_tick was not called for every hz such
that auto-negotiation complete was never handled in vge(4).
Use mii_pollstat to extract current negotiated speed/duplex instead
of mii_tick. The latter is valid only for auto-negotiation case.
While I'm here change the confusing function name vge_tick() to
vge_link_statchg().
is called in vge_init_lock(), vge(4) always used to reload EEPROM.
Also add more comment why vge(4) clears VGE_CHIPCFG0_PACPI bit.
While I'm here add missing new line in vge_reset().
controllers(VT613x), we assume the PHY address is 1.
Use the saved PHY address in MII register access routines and
remove accessing VGE_MIICFG register.
While I'm here save PCI express capability register which will be
used in near future.
record device specific bits. Remove vge_link and use vge_flags.
While here, move clearing link state before mii_mediachg() as
mii_mediachg() may affect link state.
if_alloc() of ifp. This fixes the panic reported in the PR, but
not the attach failure.
PR: kern/139079
Tested by: Steven Noonan <steven uplinklabs.net>
Reviewed by: thompsa
Approved by: ed (mentor)
MFC after: 2 weeks`
seems to work like a tag that indicates 'not list end' of queued
frames. Without having a VGE_TXDESC_Q bit indicates 'list end'. So
the last frame of multiple queued frames has no VGE_TXDESC_Q bit.
The hardware has peculiar behavior for VGE_TXDESC_Q bit handling.
If the VGE_TXDESC_Q bit of descriptor was set the controller would
fetch next descriptor. However if next descriptor's OWN bit was
cleared but VGE_TXDESC_Q was set, it could confuse controller.
Clearing VGE_TXDESC_Q bit for transmitted frames ensure correct
behavior.
o Separate TX/RX buffer DMA tag from TX/RX descriptor ring DMA tag.
o Separate RX buffer DMA tag from common buffer DMA tag. RX DMA
tag has different restriction compared to TX DMA tag.
o Add 40bit DMA address support.
o Adjust TX/RX descriptor ring alignment to 64 bytes from 256
bytes as documented in datasheet.
o Added check to ensure TX/RX ring reside within a 4GB boundary.
Since TX/RX ring shares the same high address register they
should have the same high address.
o TX/RX side bus_dmamap_load_mbuf_sg(9) support.
o Add lock assertion to vge_setmulti().
o Add RX spare DMA map to recover from DMA map load failure.
o Add optimized RX buffer handler, vge_discard_rxbuf which is
activated when vge(4) sees bad frames.
o Don't blindly update VGE_RXDESC_RESIDUECNT register. Datasheet
says the register should be updated only when number of
available RX descriptors are multiple of 4.
o Use __NO_STRICT_ALIGNMENT instead of defining VGE_FIXUP_RX which
is only set for i386 architecture. Previously vge(4) also
performed expensive copy operation to align IP header on amd64.
This change should give RX performance boost on amd64
architecture.
o Don't reinitialize controller if driver is already running. This
should reduce number of link state flipping.
o Since vge(4) drops a driver lock before passing received frame
to upper layer, make sure vge(4) is still running after
re-acquiring driver lock.
o Add second argument count to vge_rxeof(). The argument will
limit number of packets could be processed in RX handler.
o Rearrange vge_rxeof() not to allocate RX buffer if received
frame was bad packet.
o Removed if_printf that prints DMA map failure. This type of
message shouldn't be used in fast path of driver.
o Reduce number of allowed TX buffer fragments to 6 from 7. A TX
descriptor allows 7 fragments of a frame. However the CMZ field
of descriptor has just 3bits and the controller wants to see
fragment + 1 in the field. So if we have 7 fragments the field
value would be 0 which seems to cause unexpected results under
certain conditions. This change should fix occasional TX hang
observed on vge(4).
o Simplify vge_stat_locked() and add number of available TX
descriptor check.
o vge(4) controllers lack padding short frames. Make sure to fill
zero for the padded bytes. This closes unintended information
disclosure.
o Don't set VGE_TDCTL_JUMBO flag. Datasheet is not clear whether
this bit should be set by driver or write-back status bit after
transmission. At least vendor's driver does not set this bit so
remove it. Without this bit vge(4) still can send jumbo frames.
o Don't start driver when vge(4) know there are not enough RX
buffers.
o Remove volatile keyword in RX descriptor structure. This should
be handled by bus_dma(9).
o Collapse two 16bits member of TX/RX descriptor into single 32bits
member.
o Reduce number of RX descriptors to 252 from 256. The
VGE_RXDESCNUM is 16bits register but only lower 8bits are valid.
So the maximum number of RX descriptors would be 255. However
the number of should be multiple of 4 as controller wants to
update 4 RX descriptors at a time. This limits the maximum
number of RX descriptor to be 252.
Tested by: Dewayne Geraghty (dewayne.geraghty <> heuristicsystems dot com dot au)
Carey Jones (m.carey.jones <> gmail dot com)
Yoshiaki Kasahara (kasahara <> nc dor kyushu-u dot ac dotjp)
- These revisions no longer have cable detection capability.
- The UDMA support bit of register 0x4b has been dropped without an
replacement.
- According to Linux it's crucial for working ATAPI DMA support to
also set the reserved bit 1 of regsiter 0x53 with these revisions.
MFC after: 1 week
native, i.e. big-endian, format and convert as appropriate like we
also do with the multibyte fields of the other pages. This fixes
the output of acd_describe() to match reality on big-endian machines
without breaking it on little-endian ones. While at it, also convert
the remaining multibyte fields of the pages read although they are
currently unused for consistency and in order to prevent possible
similar bugs in the future.
MFC after: 1 week
was made in r199543 to remove MTX_RECURSE. These routines can be
called in device attach phase(e.g. mii_phy_probe()) so checking
assertion here is not right as caller does not hold a driver lock.
The rewrite of the interrupt handler includes:
o loop until all pending interrupts are handled. This closes a
race condition.
o count the number of interrupt sources we handled so that we can
properly return FILTER_HANDLED or FILTER_STRAY when we break out
of the loop.
o When matching the interrupt source to the devices that have that
source pending, check only from the set of devices we found to
have a pending interrupt.
PR: kern/140947
MFC after: 3 days
management over the data endpoint causes communication to die.
Take this one step further and model it on the existing NetBSD quirk and import
other device IDs from them.
Obtained from: NetBSD
are not allocated by the device driver. These resources should still appear
allocated from the system's perspective so that their assigned ranges are
not reused by other resource requests. The PCI bus driver has used a hack
to effect this for a while now where it uses rman_set_device() to assign
devices to the PCI bus when they are first encountered and later assigns
them to the actual device when a driver allocates a BAR. A few downsides of
this approach is that it results in somewhat confusing devinfo -r output as
well as not being very easily portable to other bus drivers.
This commit adds generic support for "reserved" resources to the resource
list API used by many bus drivers to manage the resources of child devices.
A resource may be reserved via resource_list_reserve(). This will allocate
the resource from the bus' parent without activating it.
resource_list_alloc() recognizes an attempt to allocate a reserved resource.
When this happens it activates the resource (if requested) and then returns
the reserved resource. Similarly, when a reserved resource is released via
resource_list_release(), it is deactivated (if it is active) and the
resource is then marked reserved again, but is left allocated from the
bus' parent. To completely remove a reserved resource, a bus driver may
use resource_list_unreserve(). A bus driver may use resource_list_busy()
to determine if a reserved resource is allocated by a child device or if
it can be unreserved.
The PCI bus driver has been changed to use this framework instead of
abusing rman_set_device() to keep track of reserved vs allocated resources.
Submitted by: imp (an older version many moons ago)
MFC after: 1 month
hw.bge.forced_collapse. hw.bge.forced_collapse affects all bge(4)
controllers on system which may not desirable behavior of the
sysctl node. Also allow the sysctl node could be modified at any
time.
Reviewed by: bde (initial version)
128 FIBs first and allocated more later if necessary. Remove now unused
definitions from the header file[1].
- Force sequential bus scanning. It seems parallel scanning is in fact
slower and causes more harm than good[1]. Adjust a comment to reflect that.
PR: kern/141269
Submitted by: Alexander Sack (asack at niksun dot com)[1]
Reviewed by: scottl
drivers. These add new hardware support, most importantly
the pch (i5 chipset) in the em driver. Also, both drivers
now have the simplified (and I hope improved) watchdog
code. The igb driver uses the new RX cleanup that I
first implemented in ixgbe.
em - version 6.9.24
igb - version 1.8.4
This adds new feature support for the 82599, a hardware
assist to LRO, doing this required a large revamp to the
RX cleanup code because the descriptor ring may not be
processed out of order, this necessitated the elimination
of global pointers.
Additionally, the RX routine now does not refresh mbufs
on every descriptor, rather it will do a range, and then
update the hardware pointer at that time. These are
performance oriented changes.
The TX side now has a cleaner simpler watchdog algorithm
as well, in TX cleanup a read of ticks is stored, that
can then be compared in local_timer to determine if
there is a hang.
Various other cleanups along the way, thanks to all who
have provided input and testing.
feature. These registers are reserved on controllers that have no
support for jumbo frame.
Only BCM5700 has mini ring so do not poke mini ring related
registers if controller is not BCM5700.
Reviewed by: marius
handler in brgphy(4) does not exist and brgphy(4) just resets the
PHY and returns EINVAL as it has no isolation handler. I also agree
on Marius's opinion that stop handler of every NIC driver seems to
be the wrong place for implementing PHY isolate/power down.
If we need PHY isolate/power down it should be implemented in
brgphy(4) and users should administratively down the PHY.
Reviewed by: marius
It makes MSI working there. Later (and cheaper) PCIe chips (3132/3531)
still randomly crashing system in few seconds of high MSI rates, generating
something inaporopriate, like NMI or "Fatal trap 30".
Introduce ATA_CAM kernel option, turning ata(4) controller drivers into
cam(4) interface modules. When enabled, this options deprecates all ata(4)
peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers
(ada, cd, ...) and interfaces to be natively used instead.
As side effect of this, ata(4) mode setting code was completely rewritten
to make controller API more strict and permit above change. While doing
this, SATA revision was separated from PATA mode. It allows DMA-incapable
SATA devices to operate and makes hw.ata.atapi_dma tunable work again.
Also allow ata(4) controller drivers (except some specific or broken ones)
to handle larger data transfers. Previous constraint of 64K was artificial
and is not really required by PCI ATA BM specification or hardware.
Submitted by: nwitehorn (powerpc part)
normal in case of media read error and some ATAPI cases, when transfer size
is unknown beforehand. PCI ATA BM specification tells that in case of such
underrun driver should just manually stop DMA engine. DMA engine should
same time guarantie that all bus mastering transfers completed at the moment
of driver reads interrupt flag asserted.
This change should fix interrupt storms and command timeouts in many cases.
PR: kern/103602, sparc64/121539, kern/133122, kern/139654
the loop down counter, as well as other things. This was brought to my
attention with a different fix, more for RELENG_7- this one covers the
multiple channel case.
PR: 140438
MFC after: 1 month
single outstanding DMA read operation. Most controllers targeted to
client with PCIe bus interface(e.g. BCM5761) may have this
limitation. All controllers for servers does not have this
limitation.
Collapsing mbuf chains to reduce number of memory reads before
transmitting was most effective way to workaround this. I got about
940Mbps from 850Mbps with mbuf collapsing on BCM5761. However it
takes a lot of CPU cycles to collapse mbuf chains so add tunable to
control the number of allowed TX buffers before collapsing. The
default value is 0 which effectively disables the forced collapsing.
For most cases 2 would yield best performance(about 930Mbps)
without much sacrificing CPU cycles.
Note the collapsing is only activated when the controller is on
PCIe bus and the frame does not need TSO operation. TSO does not
seem to suffer from the hardware limitation because the payload
size is much bigger than normal IP datagram.
Thanks to davidch@ who told me the limitation of client controllers
and actually gave possible workarounds to mitigate the limitation.
Reviewed by: davidch, marius
Ideally we should attempt attaching only to known supported devices.
But I am not sure that we have all supported PCI IDs already listed,
and I am too young to die, err, I don't want to take the heat from
causing a trouble to someone.
MFC after: 1 week
X-ToDo: drop the default case
ndis_scan() is called. However, ndis_scan() is invoked from softclock()
and cannot sleep. Move ndis_scan_results() to the ndis' driver's scan_end
hook instead.
Submitted by: Paul B Mahol onemda of gmail
MFC after: 1 week
The hardware is compliant with WDRT specification, so I originally
considered including generic WDRT watchdog support, but decided
against it, because I couldn't find anyone to the code for me.
WDRT seems to be not very popular.
Besides, generic WDRT porbably requires a slightly different driver
approach.
Reviewed by: des, gavin, rpaulo
MFC after: 3 weeks
baseline subtraction, and are very temperature sensitive, so would slowly
drift out of a calibrated state when under load. Escape this by taking
the last frame before we decide that the pad is idle as a finger-free
baseline.
Tested on: iBook G4
long as I remember, and completely superseded by better maintained umass(4).
It's main idea was to optionally avoid CAM dependency for such devices, but
with move ATA to CAM, it is not actual any more.
No objections: hselasky@, thompsa@, arch@
message has been printed is enough to get someones attention. Also remove the
line number for DPRINTF/DPRINTFN, it already prints the funtion name and a
unique message.
- fix a system deadlock on process exit when the sample buffer
is full (pmclog_loop blocked in fo_write) and pmcstat exit.
Reviewed by: jkoshy
MFC after: 3 weeks
bits on seems to confuse hardware TX engine.
- For 350 chips, set TX desc's buffer physical address before turning on the
TX desc valid bit.
Submitted by: Jeremy O'Brien obrien654j | gmail, sephe
Obtained from: DragonFly BSD
- Extend XPT-SIM transfer settings control API. Now it allows to report to
SATA SIM number of tags supported by each device, implement ATA mode and
SATA revision negotiation for both SATA and PATA SIMs.
- Make ahci(4) and siis(4) to use submitted maximum tag number, when
scheduling requests. It allows to support NCQ on devices with lower tags
count then controller supports.
- Make PMP driver to report attached devices connection speeds.
- Implement ATA mode negotiation between user settings, device and
controller capabilities.
Tx/Rx/Rx return ring such that large part of status block was not
used at all. All bge(4) controllers except BCM5700 AX/BX has a
feature to control the size of status block. So use minimum status
block size allowed in controller. This reduces number of DMAed
status block size to 32 bytes from 80 bytes.
seem to require a special firmware to use TSO. But the firmware is
not available to FreeBSD and Linux claims that the TSO performed by
the firmware is slower than hardware based TSO. Moreover the
firmware based TSO has one known bug which can't handle TSO if
ethernet header + IP/TCP header is greater than 80 bytes. The
workaround for the TSO bug exist but it seems it's too expensive
than not using TSO at all. Some hardwares also have the TSO bug so
limit the TSO to the controllers that are not affected TSO issues
(e.g. 5755 or higher).
While I'm here set VLAN tag bit to all descriptors that belengs to
a frame instead of the first descriptor of a frame. The datasheet
is not clear how to handle VLAN tag bit but it worked either way in
my testing. This makes it simplify TSO configuration a little bit.
Big thanks to davidch@ who sent me detailed TSO information.
Without this I was not able to implement it.
Tested by: current
have a DMA bug when buffer address crosses a multiple of the 4GB
boundary(e.g. 4GB, 8GB, 12GB etc). Limit DMA address to be within
4GB address for these controllers. The second DMA bug limits DMA
address to be within 40bit address space. This bug applies to
BCM5714 and BCM5715 and 5708(bce(4) controller). This is not
actually a MAC controller bug but an issue with the embedded PCIe
to PCI-X bridge in the device. So for BCM5714/BCM5715 controllers
also limit the DMA address to be within 40bit address space.
Special thanks to davidch@ who gave me detailed errata information.
I think this change will fix long standing bge(4) instability
issues on systems with more than 4GB memory.
Reviewed by: davidch
PCI flush to get correct status block update. Add an optimized
interrupt handler that is activated for MSI case. Actual interrupt
handling is done by taskqueue such that the handler does not
require driver lock for Rx path. The MSI capable bge(4) controllers
automatically disables further interrupt once it enters interrupt
state so we don't need PIO access to disable interrupt in interrupt
handler.
update and then clear status block. Previously it used to access
these index without synchronization which may cause problems when
bounce buffers are used. Also add missing bus_dmamap_sync(9) in
polling handler. Since we now update status block in driver, adjust
bus_dmamap_sync(9) for status block.
checking IFF_DRV_RUNNING and IFF_DRV_OACTIVE flags. Also if we
have less than 16 free send BDs set IFF_DRV_OACTIVE and try it
later. Previously bge(4) used to reserve 16 free send BDs after
loading dma maps but hardware just need one reserved send BD. If
prouder index has the same value of consumer index it means the Tx
queue is empty.
While I'm here check IFQ_DRV_IS_EMPTY first to save one lock
operation.
directly access them at fixed address. While I'm here don't touch
other bits of PCIe device control register except max payload size.
Reviewed by: marius
Binary divider value 10 specified in datasheet is not a hex 0x10.
UDMA2 should be 33/2 instead of 66/4, which is documented as reverved,
UDMA4 should be 66/2 instead of 66/4, which is definitely wrong.
controller also has support for IP/TCP checksum offloading for Rx
path. But I failed to find to way to enable Rx MAC to compute the
checksum of received frames.
both big-endian and little-endian format in descriptors for Rx path
but I couldn't find equivalent feature in Tx path. So just stick to
little-endian for now.
directly access them at fixed address. Frequently the register
offset could be changed if additional PCI capabilities are added to
controller.
One odd thing is ET_PCIR_L0S_L1_LATENCY register. I think it's PCIe
link capabilities register but the location of the register does
not match with PCIe capability pointer + offset. I'm not sure it's
shadow register of PCIe link capabilities register.
if_watchdog and if_timer.
- Fix some issues in detach for sn(4), ste(4), and ti(4). Primarily this
means calling ether_ifdetach() before anything else.
- Overhaul the locking to avoid recursion and add missing locking in a few
places.
- Don't schedule a task to call vge_start() from contexts that are safe to
call vge_start() directly. Just invoke the routine directly instead
(this is what all of the other NIC drivers I am familiar with do). Note
that vge(4) does not use an interrupt filter handler which is the primary
reason some other drivers use tasks.
- Add a new private timer to drive the watchdog timer instead of using
if_watchdog and if_timer.
- Fixup detach by calling ether_ifdetach() before stopping the interface.
just two different attachments (EISA and PCI) to a single driver.
- Add real locking. Previously these drivers only acquired their lock
in their interrupt handler or in the ioctl routine (but too broadly in
the latter). No locking was used for the stack calling down into the
driver via if_init() or if_start(), for device shutdown or detach. Also,
the interrupt handler held the driver lock while calling if_input(). All
this stuff should be fixed in the locking changes.
- Really fix these drivers to handle if_alloc(). The front-end attachments
were using if_initname() before the ifnet was allocated. Fix this by
moving some of the duplicated logic from each driver into pdq_ifattach().
While here, make pdq_ifattach() return an error so that the driver just
fails to attach if if_alloc() fails rather than panic'ing. Also, defer
freeing the ifnet until the driver has stopped using it during detach.
- Add a new private timer to drive the watchdog timer.
- Pass the softc pointer to the interrupt handlers instead of the device_t
so we can avoid the use of device_get_softc() and to better match what
other drivers do.
auto-negotiation. To make this simpler and easier to understand I have
split this out into two separate timers. One just manages the auto-neg
side of things and one is a transmit watchdog. Neither uses if_watchdog.
- Call ether_ifdetach() at the start of detach.
- Add a missing callout_drain() to detach.
- Hook into the stats timer and use that to drive the transmit watchdog
instead of using if_watchdog.
- Run the stats timer every second to match other drivers instead of every
other second.
- Remove dubious callout handling that stopped the timer only to start it
again while holding the driver lock without dropping it in between the
stop and the start.
reliable on some Marvell PHYs. If msk(4) know it still does not
have established link check whether msk(4) missed the link state
change by looking into polled link state.
Reported by: Mel Flynn < mel.flynn+fbsd.current <> mailing.thruhere dot net >,
Gleb Kurtsou <gleb.kurtsou <> gmail dot com >
Tested by: Gleb Kurtsou <gleb.kurtsou <> gmail dot com >
the transmit watchdog. These drivers already used a private timer when
compiled to use Netgraph. This change just makes them always use the
private timer. Note that these drivers do not compile and are disconnected
from the build due to TTY changes.
if_watchdog and if_timer. The driver already contained an optional stats
timer that individual attachments could use to provide a 'tick' event. The
stats timer only ran if the tick function pointer was non-NULL and the
attachment's tick routine had to call callout_reset(), etc. Now the driver
always schedules a stat timer and manages the callout_reset() internally.
This timer is used to drive the watchdog and will also call the attachment's
'tick' handler if one is provided.
Tested by: WATANABE Kazuhiro
and Marvell handled. Instead of trying to attach two different drivers to
single device, wrapping each call, make one of them (atajmicron, atamarvell)
attach do device solely, but create child device for AHCI driver,
passing it all required resources. It is quite easy, as none of
resources are shared, except IRQ.
As result, it:
- makes drivers operation more independent and straitforward,
- allows to use new ahci(4) driver with such devices, adding support for
new features, such as PMP and NCQ, same time keeping legacy PATA support,
- will allow to just drop old ataahci driver, when it's time come.
errors. So far 3 different classes are present (correctable,
uncorrectable and fatal) but more can be added easilly.
Obtained from: Sandvine Incorporated
Reviewed by: emase, gibbs
Sponsored by: Sandvine Incorporated
MFC: 2 weeks
These controllers provide combination of AHCI for SATA and legacy
PCI ATA for PATA. Use same solution as used for JMicron controllers.
Add IDs of Marvell 88SX6102, 88SX6111. 88SX6141 alike controllers
Right now syscons(4) uses a cons25-style terminal emulator. The
disadvantages of that are:
- Little compatibility with embedded devices with serial interfaces.
- Bad bandwidth efficiency, mainly because of the lack of scrolling
regions.
- A very hard transition path to support for modern character sets like
UTF-8.
Our terminal emulation library, libteken, has been supporting
xterm-style terminal emulation for months, so flip the switch and make
everyone use an xterm-style console driver.
I still have to enable this on i386. Right now pc98 and i386 share the
same /etc/ttys file. I'm not going to switch pc98, because it uses its
own Kanji-capable cons25 emulator.
IMPORTANT: What to do if things go wrong (i.e. graphical artifacts):
- Run the application inside script(1), try to reduce the problem and
send me the log file.
- In the mean time, you can run `vidcontrol -T cons25' and `export
TERM=cons25' so you can run applications the same way you did before.
You can also build your kernel with `options TEKEN_CONS25' to make all
virtual terminals use the cons25 emulator by default.
Discussed on: current@
page fault panic on initialization due to a large
number of bounce pages being allocated. This is due
to the dma tag requiring page alignment on mbuf mapping.
This was removed some time back from the ixgbe driver
and is not needed here either.
- Move tagged queueing control from ADA to ATA XPT. It allows to control
device command queue length correctly. First step to support < 32 tags.
- Limit queue for non-tagged devices by 2 slots for ahci(4) and siis(4).
- Implement quirk matching for ATA devices.
- Move xpt_schedule_dev_sendq() from header to source file.
- Move delayed queue shrinking to the more expected place - element freeing.
- Remove some SCSIsms in ATA.
xterm and cons25 have some incompatibilities when it comes to escape
sequences for special keys, such as F1 to F12, home, end, etc. Add a new
te_fkeystr() that can be used to override the strings.
scterm-sck won't do anything with this, but scterm-teken will use
teken_get_sequences() to obtain the proper sequence.
function that immediately reacquires the lock. Also removes recursive
locking.
- Use the statistics timer to drive the transmit watchdog instead of using
if_watchdog and if_timer.
Tested by: gavin
when they did their thing i.e. enabling SX mode
and then trying to load in. Since we are o32 this
is all un-needed. So I have re-structured the code
to work without doing this special set of code.
Packets now flow in and out.. however for some
reason dhcp/bootp response comes in and the kernel
does not proceed. Not sure if we have a UDP checksum error
or ?? The packets look all there by comparing wireshark
and the first 64 bytes of the TX and RX packets.
functions are selfcontained (ie. they touch only isa_dma.c static variables
and hardware) so a private lock is sufficient to prevent races. This changes
only i386/amd64 while there are also isa_dma functions for ia64/sparc64.
Sparc64 are ones empty stubs and ia64 ones are unused as ia64 does not
have isa (says marcel).
This patch removes explicit locking of Giant from a few drivers (there
are some that requires this but lack ones - this patch fixes this) and
also removes the need for implicit locking of Giant from attach routines
where it's provided by newbus.
Approved by: ed (mentor, implicit)
Reviewed by: jhb, attilio (glanced by)
Tested by: Giovanni Trematerra <giovanni.trematerra gmail com>
IA64 clue: marcel
during boot when ARC1200 is being used with certain motherboard models.
This commit brings the driver to the same state of vendor's 1.20.00.16
release. Many thanks to Areca for their continued support to FreeBSD.
Reported by: Jirka Mikulas <jiri mikulas com>
Submitted by: Erich Chen (Areca)
Obtained from: ftp://ftp.areca.com.tw/RaidCards/AP_Drivers/FreeBSD/DRIVER/SourceCode/arcmsr-freebsd-1.20.00.16-91010.zip
MFC after: 3 days
- fix issues regarding the mixer, where the interface number was not set in
time.
- fix wrong use of resolution parameter.
Submitted by: Hans Petter Selasky
Some EHCI chips from VIA / ATI seem to trigger interrupts before writing back
the qTD status, or miss signalling occasionally under heavy load. If the host
machine is too fast, we can miss transaction completion - when we scan the
active list the transaction still seems to be active. This generally exhibits
itself as a umass stall that never recovers.
We work around this behaviour by setting up this callback after any softintr
that completes with transactions still pending, giving us another chance to
check for completion after the writeback has taken place
Submitted by: Alexander Nedotsuko
MFC after: 3 days
Revision 1.158 says only lower ten bits of
BGE_RXLP_LOCSTAT_IFIN_DROPS register is valid. For BCM5761 case it
seems the controller maintains 16bits value for the register.
However 16bits are still too small to count all dropped packets
happened in a second. To get a correct counter we have to read the
register in bge_rxeof() which would be too expensive.
Pointed out by: bde
attach chips with generic Marvell (non-HighPoint) PCI identification.
These chips are also supported by ata(4). Some vendors, like Supermicro,
are using same chips without providing HPT RAID BIOS.
PR: kern/120842, kern/136750
MAC in bge_tick. Previously it used to show more number of input
errors. I noticed actual input errors were less than 8% even for
64 bytes UDP frames generated by netperf.
Since we always access BGE_RXLP_LOCSTAT_IFIN_DROPS register in
bge_tick, remove useless code protected by #ifdef notyet.
initializes it to ETHER_HDR_LEN so we have to override it after
calling ether_ifattch().
While I'm here remove setting if_mtu value, it's initialized in
ether_ifattach().
o acpi_hpet: auto-added 'wildcard' devices can be identified by
non-NULL handle attribute.
o acpi_ec: auto-add 'wildcard' devices can be identified by
unset (NULL) private attribute.
o acpi_cpu: use private instead of magic to store cpu id.
Reviewed by: jhb
Silence from: acpi@
MFC after: 2 weeks
X-MFC-Note: perhaps the ivar should stay for ABI stability
Introduce two spare dma maps for standard buffer and jumbo buffer
respectively. If loading a dma map failed reuse previously loaded
dma map. This should fix unloaded dma map is used in case of dma
map load failure. Also don't blindly unload dma map and defer
dma map sync and unloading operation until we know dma map for new
buffer is successfully loaded. This change saves unnecessary dma
load/unload operation. Previously bge(4) tried to reuse mbuf
with unloaded dma map which is really bad thing in bus_dma(9)
perspective.
While I'm here update if_iqdrops if we can't allocate Rx buffers.
standard buffer size. If controller is not capable of handling
jumbo frame, interface MTU couldn't be larger than standard MTU
which in turn the received should be fit in standard buffer. This
fixes bus_dmamap_sync call for jumbo ring is called even if
interface is configured to use standard MTU.
Also if total frame size could be fit into standard buffer don't
use jumbo buffers.
itself to an associated PCI device if it exists. It is little bit hackish
but it should fix build without frame buffer driver since r198964.
Fix some style(9) nits in vga_isa.c while we are here.
if_watchdog/if_timer to NULL/0 when initializing an ifnet. if_alloc()
sets those members to NULL/0 already.
(Missed this driver in the earlier commit.)
showing the message creates other side-effects. Remove the Rx
FIFO overrun message in interrupt handler. msk(4) should recover
from the FIFO overruns without any user intervention. Users can
still check the Rx FIFO overrun counter from MAC MIB statistics
maintained in driver(dev.msk.0.stats.rx.overflows).
for buffer allocation. If driver know we are out of Rx buffers let
controller stop. This should fix panic when interface is run even
if it had no configured Rx buffers.
and Rx DMA tag separately. Previously it used a common mbuf DMA tag
for both Tx and Rx path but Rx buffer(standard ring case) should
have a single DMA segment and maximum buffer size of the segment
should be less than or equal to MCLBYTES. This change also make it
possible to add TSO with minor changes.
bge_newbuf_std still has a bug for handling dma map load failure
under high network load. Just reusing mbuf is not enough as driver
already unloaded the dma map of the mbuf. Graceful recovery needs
more work.
Ideally we can just update dma address part of a Rx descriptor
because the controller never overwrite the Rx descriptor. This
requires some Rx initialization code changes and it would be done
later after fixing other incorrect bus_dma(9) usages.
- VBE 3.0 says palette format resets to 6-bit mode when video mode changes.
We simply set 8-bit mode when we switch modes if the adapter supports it.
- VBE 3.0 also says if the mode is not VGA compatible, we must use VBE
function to save/restore palette. Otherwise, VGA function may be used.
Thus, reinstate the save/load palette functions only for non-VGA compatible
modes regardless of its palette format.
- Let vesa(4) set VESA modes even if vga(4) claims to support it.
- Reset default palette if VESA pixel mode is set initially.
- Fix more style nits.
- Tear down the interrupt handler before killing the worker thread.
- Do geom withering as GEOM event to avoid acquiring the GEOM topology
lock under Giant.
PR: kern/104079
Reviewed by: joerg
Approved by: trasz (mentor)
- Rework timeout handling, to make it more graceful for devices sharing
controller port (with PMP). Wait for other commands completion/timeout
before initiating recovery.
- Handle timeouts and fatal errors with port hard-reset. The rest of
recovery will be done by XPT on receiving async event. More gracefull
per-device soft-reset recovery can be implemented later.
- Handle timeouts and fatal errors with port hard-reset. The rest of
recovery will be done by XPT on receiving async event. More gracefull
per-device soft-reset recovery can be implemented later.
- Add workaround for ATI SB600/SB700 PMP probe related bug, to speedup boot.
Most of the pieces came from Marius- correct settings for channels
and resource management. The one piece missing was that you cannot
for SBus cards replace 32 bit operations with A64 operations- not
supported.
Submitted by: marius
MFC after: 3 days
reacquiring driver lock in Rx handler. re(4) drops a driver lock
before passing received frame to upper stack and reacquire the
lock. During the time window ioctl calls could be executed and if
the ioctl was interface down request, driver will stop the
controller and free allocated mbufs. After that when driver comes
back to Rx handler again it does not know what was happend so it
could access free mbufs which in turn cause panic.
Reported by: Norbert Papke < npapk <> acm dot org >
Tested by: Norbert Papke < npapk <> acm dot org >
- Don't write actual length if the actual length pointer is NULL [2]
- correct Linux Compatibility error codes for short isochronous IN transfers
and make status field signed.
Submitted by: Leunam Elebek [1], Manuel Gebele [2]
do support 64bit addresses, the current SCRIPTS code supports only 32bit
addresses causing data corruption for buffer addresses >4GB. This problem
affects 64bit machines with more than 4GB RAM or amd64 with 4GB and
memory hole remapping.
Work-around this problem with a bus_dma tag that requests bounce-buffers
for addresses >4GB. This causes some overhead, but given the maximum SCSI
bus speed of 160MB/s compared, the effect should hardly be noticeable.
The problem was reported by Mike Watters (mike at mwatters net) who also
verified that this fix cures the problem.
Since this change is a NOOP on systems with less than 4GB RAM and fixes
data corruption (in RAM and on disk) on systems with more than 4GB, I hope
that this change is accepted for 8.0.
MFC after: 3 days (pending approval)
- Remove most of direct relations between ATA(4) peripherial and controller
levels. It makes logic more transparent and is a mandatory step to wrap
ATA(4) controller level into ATA-native CAM SIM.
- Tune AHCI and SATA2 SiI drivers memory allocation a bit to allow bigger
I/O transaction sizes without additional cost.
- Don't bother to assign vb until we know we have enough space
- Add variables for sx2, sy2, dx2, dy2 so that these aren't
calculated over and over, also reduce chance of errors.
- Use switch to assign color/format
MFC after: 3 days
- We don't need to check malloc return values with M_WAITOK
- remove variables that we don't really need
- cleanup the error paths by just calling drm_sg_cleanup()
- fix drm_sg_cleanup() to be safe to call at any time
MFC after: 2 weeks
