- everything related to LRO should be in #ifdef INET blocks
- reorder sge_iq's fields so that the most frequently used are all together
- pull all rx code into t4_intr_data directly
- let go of the ingress queue lock when passing up data
- refill the freelist only if it is short of at least 32 buffers
determining whether to use MRR or not.
It uses the 11g protection mode when calculating 11n related stuff, rather
than checking the 11n protection mode.
Furthermore, the 11n chipsets can quite happily handle multi-rate retry w/
protection; the TX path and rate control modules need to be taught about
that.
* change the BB gating logic to explicitly define which chips are covered;
the ath9k method isn't as clear.
* don't disable the BB gating for now, the ar5416 initvals have it, and the
ar9160 initval sets it to 0x0. Figure out why before re-enabling this.
* migrate the Merlin (ar9280) applicable WAR from the Kite (ar9285) code
(which won't get called for Merlin!) and stuff it in here.
* add dot11rate_label() which returns Mb or MCS based on legacy or HT
* use it everywhere dot11rate() is used
* in the "current selection" part at the top of the debugging output,
otuput what the rate itself is rather than the rix. The rate index
(rix) has very little meaning to normal humans who don't know how
to find the PHY settings for each of the chipsets; pointing out the
rix rate and type is likely more useful.
These flags are just plain wrong - they're the node flags from negotiation,
not the configured flags. I'll jump in later on and figure out exactly
what should be done to properly set these two flags when in both STA mode
(ie, what the AP says is possible and what's configured) and AP mode
(ie, where the AP has a configuration, but then negotiates what's possible
with each node, so per-node configuration can and will differ.)
This allows the 11n 2.4ghz/ht20 mode to associate (but perform poorly still)
and exchange MCS rates with atheros reference APs and a Cisco/Linksys
E3000 AP.
operation. Previously ownership was transferred to hardware before
setting address of new RX buffer such that it was possible for
hardware to use wrong RX buffer address.
While here keep compiler from re-ordering instructions by declaring
descriptor members volatile. Memory barriers would do the same job
but volatile is supposed to be cheaper than using memory barriers,
especially on MP systems.
Submitted by: marius
MFC after: 1 week
mps.c: Hide the 'out of chain frames' warning behind MPS_INFO.
mps_sas.c: Hide the SIM queue freeze/unfreeze messages behind MPS_INFO.
mpsvar.h: Bump the number of chain frames from 1024 to 2048. From
testing, it looks like this makes it less likely that we'll
run out of chain frames, and it doesn't cost much memory
(32K).
MFC after: 3 days
means of allowing vendor specific interface class for audio and MIDI devices.
- Add new quirks for this. The vendor and product list in OpenBSD's
dev/usb/umidi_quirks.c was used as reference.
MFC after: 14 days
Approved by: thompsa (mentor)
causing the size calculation to be truncated to the size of an int
(32-bits on all current architectures).
Submitted by: Anish akgupt3 of gmail
MFC after: 1 week
link flips during alias address insertion or dhclient operation.
While I'm here remove dc_reset() in DC_ISR_BUS_ERR case. Device is
fully reinitialized again in dc_init_locked().
* Turn ath_tx_calc_ctsduration() into a function that
returns the ctsduration, or -1 for HT rates;
* add a printf() to ath_tx_calc_ctsduration() which will be
very loud if somehow that function is called with an MCS
rate;
* Add ath_tx_get_rtscts_rate() which returns the RTS/CTS
rate to use for the given data rate, incl. the short
preamble flag;
* Only call ath_tx_calc_ctsduration() for non-11n chipsets;
11n chipsets don't require the rtscts duration to be
calculated.
It's used to calculate:
* the initial per-rate entries for short/long preamble ACK durations;
* packet durations for TDMA slot decisions;
* RTS/CTS protection durations;
* updating the duration field in the 802.11 frame header
This way invalid durations will generate a warning, prompting for it to be
fixed.
respectively and fix all bus_dma(9) issues seen when bounce buffers
are used.
o Setup frame handling had no bus_dmamap_sync(9) which prevented
driver from configuring RX filter. Add missing bus_dmamap_sync(9)
in both dc_setfilt_21143()/dc_setfilt_xircom() and dc_txeof().
o Use bus_addr_t for DMA segment instead of using u_int32_t.
o Introduce dc_dma_alloc()/dc_dma_free() functions to allocate/free
DMA'able memory.
o Create two DMA descriptor list for each TX/RX lists. This change
will minimize the size of bounce buffers that would be used in
each TX/RX path. Previously driver had to copy both TX/RX lists
when bounce buffer is active.
o 21143 data sheet says descriptor list requires 4 bytes alignment.
Remove PAGE_SIZE alignment restriction and use
sizeof(struct dc_dec).
o Setup frame requires 4 bytes alignment. Remove PAGE_SIZE
alignment restriction and use sizeof(struct dc_dec).
o Add missing DMA map unload for both setup frame and TX/RX
descriptor list.
o Overhaul RX handling logic such that make driver always allocate
new RX buffer with dc_newbuf(). Previously driver allowed to
copy received frame with m_devget(9) after passing the
descriptor ownership to controller. This can lead to passing
wrong frame to upper stack.
o Introduce dc_discard_rxbuf() which will discard received frame
and reuse loaded DMA map and RX mbuf.
o Correct several wrong bus_dmamap_sync(9) usage in dc_rxeof and
dc_txeof. The TX/RX descriptor lists are updated by both driver
and HW so READ/WRITE semantics should be used.
o If driver failed to allocate new RX buffer, update if_iqdrops
counter instead of if_ierrors since driver received the frame
without errors.
o Make sure to unload loaded setup frame DMA map in dc_txeof and
clear the mark of setup frame of the TX descriptor in dc_txeof().
o Add check for possible TX descriptor overruns in dc_encap() and
move check for free buffer to caller, dc_start_locked().
o Swap the loaded DMA map and the last DMA map for multi-segmented
frames. Since dc_txeof() assumes the last descriptor of the
frame has the DMA map, driver should swap the first and the last
DMA map in dc_encap(). Previously driver tried to unload
not-yet-loaded DMA map such that the loaded DMA map was not
unloaded at all for multi-segmented frames.
o Rewrite DC_RXDESC/DC_TXDESC macro to simpler one.
o Remove definition of ETHER_ALIGN, it's already defined in
ethernet.h.
With this changes, dc(4) works with bounce buffers and it shall
also fix issues which might have shown in PAE environments.
Tested by: marius
Previously dc(4) always checked whether there is pending interrupts
and this consumed a lot of CPU cycles in interrupt handler. Limit
the number of processing for TX/RX frames to 16. Also allow sending
frames in the loop not to starve TX under high RX load.
Reading DC_ISR register should be protected with driver lock,
otherwise interrupt handler could be run(e.g. link state change)
before the completion of dc_init_locked().
While I'm here remove unneeded code.
as well as controller has enough free TX descriptors.
Remove check for number of queued frames before attempting to
transmit. I guess it was added to allow draining queued frames
even if there is no link. I'm under the impression this type of
check should be done in upper layer. No other drivers in tree do
that.
ownership to controller before completion of access to the
descriptor. Driver is faking up status word so it should not give
ownership to controller until it completes RX processing.
