Brandon Bergren 0d356a5349 [PowerPC64LE] Fix AP spinup on powernv. ... OPAL unconditionally enters secondary CPUs with only HV and SF set. I tried writing a secondary entry point instead, but OPAL rejected it and I am unsure why, so I resorted to making the system reset interrupt endian-flexible. This means we take a slight performance hit on wakeup on LE, but it is a good stopgap until we can figure out a reliable way to make OPAL enter where we want it to. It probably makes sense to have it around anyway, because I can imagine scenarios where the cpu resets itself to BE and does a software reset. Sponsored by: Tag1 Consulting, Inc.		2020-09-23 01:56:26 +00:00
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aim_machdep.c	[PowerPC64LE] LE bringup work: locore / machdep / platform	2020-09-22 23:55:34 +00:00
locore.S
locore32.S	powerpc64: Add a trap stack area	2019-02-04 16:02:03 +00:00
locore64.S	[PowerPC64LE] LE bringup work: locore / machdep / platform	2020-09-22 23:55:34 +00:00
mmu_oea.c	[PowerPC] Implement pmap_mincore() for moea	2020-09-13 16:46:03 +00:00
mmu_oea64.c	[PowerPC64] Implement pmap_mincore() for moea64	2020-09-13 16:42:49 +00:00
mmu_oea64.h	powerpc: clean up empty lines in .c and .h files	2020-09-01 21:20:08 +00:00
mmu_radix.c	Include the psind in data returned by mincore(2).	2020-09-02 18:16:43 +00:00
moea64_native.c	[PowerPC64LE] Implement endian-independent dword atomic PTE lock.	2020-09-23 01:33:54 +00:00
mp_cpudep.c	powerpc: clean up empty lines in .c and .h files	2020-09-01 21:20:08 +00:00
slb.c	powerpc: clean up empty lines in .c and .h files	2020-09-01 21:20:08 +00:00
trap_subr32.S	[PowerPC] Fix invalid asm in trap code	2020-05-27 00:17:05 +00:00
trap_subr64.S	[PowerPC64LE] Fix AP spinup on powernv.	2020-09-23 01:56:26 +00:00