Kornel Dulęba 0627a69cd8 e6000sw: Fix direct register write logic ... When accessing a register directly from etherswitchcfg one must specify a register group(e.g. registers of portN) and the register offset within the group. The latter is passed as the 5 least significant bits. Extract the former by dividing the register address by 32, not by 5. Approved by: mw(mentor) Obtained from: Semihalf Sponsored by: Stormshield MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D35672 (cherry picked from commit 6654825907)		2022-07-19 11:36:55 +02:00
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arswitch	[arswitch] Implement the switch MAC address fetch API.	2018-02-06 08:35:49 +00:00
e6000sw	e6000sw: Fix direct register write logic	2022-07-19 11:36:55 +02:00
infineon
ip17x
micrel
mtkswitch	etherswitch(4): Fix a few common typos in source code comments	2022-04-09 08:17:04 +02:00
rtl8366	Mark more nodes as CTLFLAG_MPSAFE or CTLFLAG_NEEDGIANT (17 of many)	2020-02-26 14:26:36 +00:00
ukswitch
etherswitch.c	[etherswitch] add the first pass of a simple API to flush and fetch the L2 address table from the ethernet switch.	2018-02-02 02:05:14 +00:00
etherswitch.h	[etherswitch] bump register width to 32 bits.	2020-05-08 22:22:12 +00:00
etherswitch_if.m	[etherswitch] add the first pass of a simple API to flush and fetch the L2 address table from the ethernet switch.	2018-02-02 02:05:14 +00:00
miiproxy.c
miiproxy.h