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board versions with no BIOS. Separate mailbox interrupts from IOCB interrupts. Read OUTMAILBOX5 while RISC_INT is active- not after you clear it (potential race condition). Clear out older broken BIG_ENDIAN goop. Don't negotiate narrow/async for LVD busses at startup if already in LVD mode. Note usage of presumptive 1040C revision. For all the LIP, PDB Changed, Loop UP/DOWN async events, mark fw state as unknown as well as marking the need to do a getpdb on targets- after a LIP for certain the f/w has to do PRLI/PLOGI for all targets again and marking f/w state as unknown gives us a fighting chance to (start to) hold up for that to complete. |
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| .. | ||
| asm_pci.h | ||
| asm_sbus.h | ||
| isp.c | ||
| isp_freebsd.c | ||
| isp_freebsd.h | ||
| isp_freebsd_cam.h | ||
| isp_pci.c | ||
| ispmbox.h | ||
| ispreg.h | ||
| ispvar.h | ||