mirror of
https://github.com/opnsense/src.git
synced 2026-02-12 23:36:07 -05:00
RISC-V is a new ISA designed to support computer research and education, and is now become a standard open architecture for industry implementations. This is a minimal set of changes required to run 'make kernel-toolchain' using external (GNU) toolchain. The FreeBSD/RISC-V project home: https://wiki.freebsd.org/riscv. Reviewed by: andrew, bdrewery, emaste, imp Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D4445 |
||
|---|---|---|
| .. | ||
| ttys | ||