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* Add the siba bus phy/mac/bandwidth clock definitions (TGSLOW*) * Add the PHY-N register gateway (BWN_PHY_N()) * Add the PHY-N TX phystat1 register - we need to actually fill out more of the PHY encoding information when we assemble a frame. * Various ancillary stuff Nothing uses this yet, but I do have CCK/OFDM somewhat working in 2GHz mode on a PHY-N device. Obtained from: b43 (definitions) |
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| .. | ||
| bwn_mac.c | ||
| if_bwn.c | ||
| if_bwn_debug.h | ||
| if_bwn_misc.h | ||
| if_bwn_pci.c | ||
| if_bwn_pcivar.h | ||
| if_bwn_phy_g.c | ||
| if_bwn_phy_g.h | ||
| if_bwn_phy_lp.c | ||
| if_bwn_phy_lp.h | ||
| if_bwnreg.h | ||
| if_bwnvar.h | ||