Ian Lepore 21c4bbedbc Avoid AXI bus issues due to a MAC reset on imx6sx and imx7. ... When the FEC is connected to the AXI bus (indicated by AVB flag), a MAC reset while a bus transaction is pending can hang the bus. Instead of resetting, turn off the ENABLE bit, which allows the hardware to complete any in-progress transfers (appending a bad CRC to any partial packet) and release the AXI bus. This could probably be done unconditionally for all hardware variants, but that hasn't been tested. PR: 222634 Submitted by: sebastian.huber@embedded-brains.de		2017-10-28 17:30:49 +00:00
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if_ffec.c	Avoid AXI bus issues due to a MAC reset on imx6sx and imx7.	2017-10-28 17:30:49 +00:00
if_ffecreg.h	Add FECFLAG_AVB variant flag to support new features on imx7.	2017-10-28 17:06:13 +00:00