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* Add the MDIO clock probe during clock initialisation; * Update the ethernet PLL configuration function to use the correct values; * Add a GMAC block configuration to pull the configuration out of hints; * Add an ethernet switch reconfiguration method. Tested: * AR9344 SoC (DB120) .. however, this has been tested with extra patches in my tree (to fix the ethernet/MDIO support, SPI support, ethernet switch support) and thus it isn't enough to bring the full board support up. |
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| adm5120 | ||
| alchemy | ||
| atheros | ||
| beri | ||
| cavium | ||
| conf | ||
| gxemul | ||
| idt | ||
| include | ||
| malta | ||
| mips | ||
| nlm | ||
| rmi | ||
| rt305x | ||
| sentry5 | ||
| sibyte | ||