Mitchell Horne f0577f42b2 riscv timer: remove intermediate helper ... get_counts() doesn't do anything at the moment but return the result of get_cycles(), so remove it. For clarity, rename get_cycles() to get_timecount(); RISC-V defines separate time and cyclecount CSRs, so let's avoid confusing the two. They may be backed by the same underlying clock, but this is an implementation detail. MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D35461 (cherry picked from commit b82f4170fc)		2022-07-04 13:37:05 -03:00
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allwinner	aw_wdog: support Allwinner D1 watchdog	2022-05-16 10:34:04 -03:00
conf	aw_wdog: support Allwinner D1 watchdog	2022-05-16 10:34:04 -03:00
include	Create sys/reg.h for the common code previously in machine/reg.h	2022-05-12 15:12:59 -07:00
riscv	riscv timer: remove intermediate helper	2022-07-04 13:37:05 -03:00
sifive	sifive_spi: Add missing case for SPIBUS_MODE_NONE	2021-09-07 13:08:20 +01:00