Marcel Moolenaar 6239f9e5f1 With rev 1.24 of sys/powerpc/powermac/macio.c, we now get a ... total of 6 interrupt resources for scc(4) on macio(4). This is 3 per channel, of which the 1st of each channel is the interrupt associated with the SCC. The other 2 are for DMA operation. Change scc_bfe_attach() to accept an argument that's the number of interrupts per channel (ipc) and change each bus front-end (bfe) to pass that argument through a wrapper for the device_attach method. For now, we only allocate the 1st interrupt of each channel to perserve behaviour.		2008-04-26 18:40:59 +00:00
..
scc_bfe.h	With rev 1.24 of sys/powerpc/powermac/macio.c, we now get a	2008-04-26 18:40:59 +00:00
scc_bfe_ebus.c	With rev 1.24 of sys/powerpc/powermac/macio.c, we now get a	2008-04-26 18:40:59 +00:00
scc_bfe_macio.c	With rev 1.24 of sys/powerpc/powermac/macio.c, we now get a	2008-04-26 18:40:59 +00:00
scc_bfe_quicc.c	With rev 1.24 of sys/powerpc/powermac/macio.c, we now get a	2008-04-26 18:40:59 +00:00
scc_bfe_sbus.c	With rev 1.24 of sys/powerpc/powermac/macio.c, we now get a	2008-04-26 18:40:59 +00:00
scc_bus.h	Support for Freescale QUad Integrated Communications Controller.	2008-03-03 18:20:17 +00:00
scc_core.c	With rev 1.24 of sys/powerpc/powermac/macio.c, we now get a	2008-04-26 18:40:59 +00:00
scc_dev_quicc.c	Support for Freescale QUad Integrated Communications Controller.	2008-03-03 18:20:17 +00:00
scc_dev_sab82532.c
scc_dev_z8530.c
scc_if.m