Neel Natu d72978ecd7 Get rid of code that dealt with the hardware not being able to save/restore ... the PAT MSR on guest exit/entry. This workaround was done for a beta release of VMware Fusion 5 but is no longer needed in later versions. All Intel CPUs since Nehalem have supported saving and restoring MSR_PAT in the VM exit and entry controls. Discussed with: grehan		2014-10-02 05:32:29 +00:00
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ept.c	Restructure the MSR handling so it is entirely handled by processor-specific	2014-09-20 02:35:21 +00:00
ept.h	Don't expose 'vmm_ipinum' as a global.	2014-01-09 03:25:54 +00:00
vmcs.c	Add emulation for legacy x86 task switching mechanism.	2014-07-16 21:26:26 +00:00
vmcs.h	Restructure the MSR handling so it is entirely handled by processor-specific	2014-09-20 02:35:21 +00:00
vmx.c	Get rid of code that dealt with the hardware not being able to save/restore	2014-10-02 05:32:29 +00:00
vmx.h	Restructure the MSR handling so it is entirely handled by processor-specific	2014-09-20 02:35:21 +00:00
vmx_controls.h	Use the 'Virtual Interrupt Delivery' feature of Intel VT-x if supported by	2014-01-07 21:04:49 +00:00
vmx_cpufunc.h	Fix issue found with clang build. Avoid code insertion by the compiler	2012-11-06 02:43:41 +00:00
vmx_genassym.c	There is no need to save and restore the host's return address in the	2014-04-11 20:15:53 +00:00
vmx_msr.c	Restructure the MSR handling so it is entirely handled by processor-specific	2014-09-20 02:35:21 +00:00
vmx_msr.h	Restructure the MSR handling so it is entirely handled by processor-specific	2014-09-20 02:35:21 +00:00
vmx_support.S	Make the vmx asm code dtrace-fbt-friendly by	2014-05-18 03:50:17 +00:00
vtd.c	Use the max guest memory address when creating its iommu domain.	2014-08-14 05:00:45 +00:00