Roger Pau Monné f186ed526a xen/intr: fix the event channel enabled per-cpu mask ... Fix two issues with the current event channel code, first ENABLED_SETSIZE is not correctly defined and then using a BITSET to store the per-cpu masks is not portable to other arches, since on arm32 the event channel arrays shared with the hypervisor are of type uint64_t and not long. Partially restore the previous code but switch the bit operations to use the recently introduced xen_{set/clear/test}_bit versions. Reviewed by: Julien Grall <julien.grall@citrix.com> Sponsored by: Citrix Systems R&D Differential Revision: https://reviews.freebsd.org/D4080		2015-11-05 14:33:46 +00:00
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acpica	Add ASUS Sandybridge laptops to the similar x2apic disable logic	2015-09-16 01:44:11 +00:00
bios	Add missing header needed by free(9).	2012-09-30 15:42:20 +00:00
cpufreq	Pull in r267961 and r267973 again. Fix for issues reported will follow.	2014-06-28 03:56:17 +00:00
include	xen: Code cleanup and small bug fixes	2015-10-21 10:44:07 +00:00
iommu	dmar_ctx_dtr() does not exist since r284869. Remove the static function	2015-09-22 16:50:59 +00:00
isa	Set the initial system time to a sane (as in: not end of 21st century) value when	2015-06-29 17:02:09 +00:00
pci	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
x86	Fix an alignment check that is wrong in half the busdma implementations.	2015-11-02 23:37:19 +00:00
xen	xen/intr: fix the event channel enabled per-cpu mask	2015-11-05 14:33:46 +00:00