opnsense-src/sys/x86/include
Konstantin Belousov 0a110d5b17 Use VT-d interrupt remapping block (IR) to perform FSB messages
translation.  In particular, despite IO-APICs only take 8bit apic id,
IR translation structures accept 32bit APIC Id, which allows x2APIC
mode to function properly.  Extend msi_cpu of struct msi_intrsrc and
io_cpu of ioapic_intsrc to full int from one byte.

KPI of IR is isolated into the x86/iommu/iommu_intrmap.h, to avoid
bringing all dmar headers into interrupt code. The non-PCI(e) devices
which generate message interrupts on FSB require special handling. The
HPET FSB interrupts are remapped, while DMAR interrupts are not.

For each msi and ioapic interrupt source, the iommu cookie is added,
which is in fact index of the IRE (interrupt remap entry) in the IR
table. Cookie is made at the source allocation time, and then used at
the map time to fill both IRE and device registers. The MSI
address/data registers and IO-APIC redirection registers are
programmed with the special values which are recognized by IR and used
to restore the IRE index, to find proper delivery mode and target.
Map all MSI interrupts in the block when msi_map() is called.

Since an interrupt source setup and dismantle code are done in the
non-sleepable context, flushing interrupt entries cache in the IR
hardware, which is done async and ideally waits for the interrupt,
requires busy-wait for queue to drain.  The dmar_qi_wait_for_seq() is
modified to take a boolean argument requesting busy-wait for the
written sequence number instead of waiting for interrupt.

Some interrupts are configured before IR is initialized, e.g. ACPI
SCI.  Add intr_reprogram() function to reprogram all already
configured interrupts, and call it immediately before an IR unit is
enabled.  There is still a small window after the IO-APIC redirection
entry is reprogrammed with cookie but before the unit is enabled, but
to fix this properly, IR must be started much earlier.

Add workarounds for 5500 and X58 northbridges, some revisions of which
have severe flaws in handling IR.  Use the same identification methods
as employed by Linux.

Review:	https://reviews.freebsd.org/D1892
Reviewed by:	neel
Discussed with:	jhb
Tested by:	glebius, pho (previous versions)
Sponsored by:	The FreeBSD Foundation
MFC after:	3 weeks
2015-03-19 13:57:47 +00:00
..
_align.h Merge amd64/i386 _align.h by aligning on the size of register_t (copied 2010-11-26 10:59:20 +00:00
_inttypes.h Copy powerpc/include/_inttypes.h to x86 and replace i386/amd64/pc98 2011-01-08 18:09:48 +00:00
_limits.h Consitently use "__LP64__". 2012-05-24 21:44:46 +00:00
_stdint.h Make the wchar_t type machine dependent. 2012-06-24 04:15:58 +00:00
_types.h Rename __wchar_t so it no longer conflicts with __wchar_t from clang 3.4 2014-04-01 14:46:11 +00:00
acpica_machdep.h x86/madt: make the interrupt override parser a public function 2014-08-04 08:58:50 +00:00
apicreg.h Add x2APIC support. Enable it by default if CPU is capable. The 2015-02-09 21:00:56 +00:00
apicvar.h Use VT-d interrupt remapping block (IR) to perform FSB messages 2015-03-19 13:57:47 +00:00
apm_bios.h Move identical copies of apm_bios.h to sys/x86/include, replace them with 2010-11-11 19:36:21 +00:00
bus.h Update NetBSD Foundation copyrights to 2-clause BSD 2014-03-18 01:40:25 +00:00
busdma_impl.h Remove redundand declaration, fixing the build with gcc. 2013-10-29 07:25:54 +00:00
dump.h Factor out duplicated code from dumpsys() on each architecture into generic 2015-01-07 01:01:39 +00:00
elf.h Convert machine/elf.h, machine/frame.h, machine/sigframe.h, 2013-02-20 17:39:52 +00:00
endian.h Fix an issue introduced in sys/x86/include/endian.h with r232721. In 2012-03-29 23:31:48 +00:00
fdt.h Retire machine/fdt.h as a header used by MI code, as its function is now 2014-01-05 18:46:58 +00:00
float.h Consitently use "__LP64__". 2012-05-24 21:44:46 +00:00
fpu.h Improve support for XSAVE with debuggers. 2014-11-21 20:53:17 +00:00
frame.h Convert machine/elf.h, machine/frame.h, machine/sigframe.h, 2013-02-20 17:39:52 +00:00
init.h msi: add Xen MSI implementation 2014-09-30 16:46:45 +00:00
legacyvar.h Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridge 2014-02-12 04:30:37 +00:00
mca.h Make machine check exception logging more readable. On newer Intel systems, 2012-04-02 15:07:22 +00:00
mptable.h Use fixed-width types for all fields in MP Table structures and pack 2013-12-11 21:19:04 +00:00
ofw_machdep.h Retire machine/fdt.h as a header used by MI code, as its function is now 2014-01-05 18:46:58 +00:00
pci_cfgreg.h Move {amd64,i386}/pci/pci_bus.c and {amd64,i386}/include/pci_cfgreg.h to 2011-06-22 21:04:13 +00:00
psl.h x86: Allow users to change PSL_RF via ptrace(PT_SETREGS...) 2013-11-14 15:37:20 +00:00
ptrace.h Improve support for XSAVE with debuggers. 2014-11-21 20:53:17 +00:00
pvclock.h Add interface to derive a TSC frequency from the pvclock 2015-02-04 08:33:04 +00:00
reg.h Eliminate ia32_reg.h by moving its contents to x86 and ia64 reg.h. 2012-03-18 19:12:11 +00:00
segments.h Remove ia64. 2014-07-07 00:27:09 +00:00
setjmp.h Copy amd64 setjmp.h to x86 and replace amd64/i386/pc98 setjmp.h with stubs. 2012-02-28 22:17:52 +00:00
sigframe.h Convert machine/elf.h, machine/frame.h, machine/sigframe.h, 2013-02-20 17:39:52 +00:00
signal.h Convert machine/elf.h, machine/frame.h, machine/sigframe.h, 2013-02-20 17:39:52 +00:00
specialreg.h Add x2APIC support. Enable it by default if CPU is capable. The 2015-02-09 21:00:56 +00:00
stdarg.h Add a va_copy() to our fall-back stdarg implementation for use with lint(1) 2013-10-07 10:01:23 +00:00
sysarch.h Copy amd64 sysarch.h to x86 and merge with i386 sysarch.h. Replace 2012-03-19 21:57:31 +00:00
trap.h Remove references to an unused fasttrap probe hook, and remove the 2013-10-31 02:35:00 +00:00
ucontext.h Convert machine/elf.h, machine/frame.h, machine/sigframe.h, 2013-02-20 17:39:52 +00:00
vdso.h Implement mechanism to export some kernel timekeeping data to 2012-06-22 07:06:40 +00:00
vmware.h Detect whether x2APIC on VMWare is usable without interrupt 2015-02-14 09:00:12 +00:00