mirror of
https://github.com/opnsense/src.git
synced 2026-03-09 17:51:07 -04:00
to being more generic. Other embedded SoCs also throw the configuration/PCI register info into flash. For now I'm just hard-coding the AR9280 option (for on-board AR9220's on AP94 and commercial designs (eg D-Link DIR-825.)) TODO: * Figure out how to support it for all 11n SoC NICs by doing it in ar5416InitState(); * Don't hard-code the EEPROM size - add another field which is set by the relevant chip initialisation code. * 'owl_eep_start_loc' may need to be overridden in some cases to 0x0. I need to do some further digging. |
||
|---|---|---|
| .. | ||
| ar9130.ini | ||
| ar9130_attach.c | ||
| ar9130_eeprom.c | ||
| ar9130_eeprom.h | ||
| ar9130_phy.c | ||
| ar9130_phy.h | ||
| ar9130reg.h | ||
| ar9160.ini | ||
| ar9160_attach.c | ||