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putting descriptors (not buffers) across a 4k page boundary can cause issues. I've not seen it in production myself but it apparently can cause problems. So, in preparation for addressing this workaround, (re)-expose the particular HAL capability bit which marks whether the chipset has support for cross-4k- boundary transactions or not. A subsequent commit will modify the descriptor allocation to avoid allocating descriptor entries that straddle a 4k page boundary. |
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|---|---|---|
| .. | ||
| ath_hal | ||
| ath_rate | ||
| ah_osdep.c | ||
| ah_osdep.h | ||
| if_ath.c | ||
| if_ath_debug.c | ||
| if_ath_debug.h | ||
| if_ath_misc.h | ||
| if_ath_pci.c | ||
| if_ath_tx.c | ||
| if_ath_tx.h | ||
| if_ath_tx_ht.c | ||
| if_ath_tx_ht.h | ||
| if_athioctl.h | ||
| if_athrate.h | ||
| if_athvar.h | ||