Mitchell Horne 9ce0b407c2 Implement vm.pmap.kernel_maps for RISC-V ... This is taken from the arm64 version, with the following simplifications: - Our current pmap implementation uses a 3-level paging scheme - The "mode" field has been omitted since RISC-V PTEs don't encode typical mode attributes Reviewed by: markj Differential Revision: https://reviews.freebsd.org/D23594		2020-02-12 14:06:02 +00:00
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conf	Include the PCI stack to the riscv GENERIC kernel.	2020-01-24 17:10:21 +00:00
include	Store offset into zpcpu allocations in the per-cpu area.	2020-02-12 11:11:22 +00:00
riscv	Implement vm.pmap.kernel_maps for RISC-V	2020-02-12 14:06:02 +00:00
sifive	prci: register tlclk as a fixed clock	2020-02-01 17:13:52 +00:00