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7fca0e69f6
above 1Kbyte. It might look like some XHCI(4) controllers do not support when the USB control transfer is split using a link TRB. The next NORMAL TRB after the link TRB is simply failing with XHCI error code 4. The quirk ensures we allocate a 64Kbyte buffer so that the data stage TRB is not broken with a link TRB. Found at: EuroBSDcon 2019 MFC after: 1 week Sponsored by: Mellanox Technologies |
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| .. | ||
| atmegadci.c | ||
| atmegadci.h | ||
| avr32dci.c | ||
| avr32dci.h | ||
| dwc_otg.c | ||
| dwc_otg.h | ||
| dwc_otg_fdt.c | ||
| dwc_otg_fdt.h | ||
| dwc_otg_hisi.c | ||
| dwc_otgreg.h | ||
| ehci.c | ||
| ehci.h | ||
| ehci_fsl.c | ||
| ehci_imx.c | ||
| ehci_msm.c | ||
| ehci_mv.c | ||
| ehci_pci.c | ||
| ehcireg.h | ||
| generic_ehci.c | ||
| generic_ohci.c | ||
| generic_usb_if.m | ||
| generic_xhci.c | ||
| generic_xhci.h | ||
| generic_xhci_acpi.c | ||
| generic_xhci_fdt.c | ||
| musb_otg.c | ||
| musb_otg.h | ||
| ohci.c | ||
| ohci.h | ||
| ohci_pci.c | ||
| ohcireg.h | ||
| saf1761_otg.c | ||
| saf1761_otg.h | ||
| saf1761_otg_boot.c | ||
| saf1761_otg_fdt.c | ||
| saf1761_otg_reg.h | ||
| uhci.c | ||
| uhci.h | ||
| uhci_pci.c | ||
| uhcireg.h | ||
| usb_controller.c | ||
| usb_nop_xceiv.c | ||
| uss820dci.c | ||
| uss820dci.h | ||
| xhci.c | ||
| xhci.h | ||
| xhci_pci.c | ||
| xhcireg.h | ||