Olivier Houchard 2feb83cec2 Introduce CPU_XSCALE_CORE3, as XScale Core 3 is significally different than ... regular Xscale (it has no mini data cache, has armv6-style 16MB supersections, and can address 36bits). Define it for i81342.		2006-11-30 23:30:40 +00:00
..
_bus.h
_inttypes.h
_limits.h
_stdint.h
_types.h
armreg.h	Identify the xscale 81342.	2006-11-07 22:36:57 +00:00
asm.h
asmacros.h
atomic.h	Add atomic_cmpset_acq_32.	2006-11-07 11:53:44 +00:00
blockio.h
bootconfig.h
bus.h	correct bus space unmap prototype	2006-11-19 23:46:50 +00:00
bus_dma.h
clock.h	First part of a little cleanup in the calendar/timezone/RTC handling.	2006-10-02 12:59:59 +00:00
cpu.h
cpuconf.h	Introduce CPU_XSCALE_CORE3, as XScale Core 3 is significally different than	2006-11-30 23:30:40 +00:00
cpufunc.h	Identify the xscale 81342.	2006-11-07 22:36:57 +00:00
db_machdep.h
disassem.h
elf.h	PR:	2006-10-04 21:37:10 +00:00
endian.h
exec.h
fiq.h
float.h
floatingpoint.h
fp.h
frame.h
gdb_machdep.h
ieee.h
ieeefp.h
in_cksum.h
intr.h
katelib.h
kdb.h
limits.h
machdep.h
md_var.h
memdev.h
metadata.h
mutex.h
param.h
pcb.h
pcpu.h
pmap.h	Fix a comment.	2006-11-13 06:26:57 +00:00
pmc_mdep.h
proc.h
profile.h
psl.h
pte.h
ptrace.h
reg.h
reloc.h
resource.h
runq.h
setjmp.h
sf_buf.h
sigframe.h
signal.h
smp.h
stdarg.h
swi.h
sysarch.h
trap.h
ucontext.h
undefined.h
utrap.h
vmparam.h