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This adds read only support for the W25N series of flash parts. Specifically starting with the W25N01GV, a 128MiB SPI NAND flash. This doesn't currently support writing or erasing, as this requires a NAND flash layer that we don't currently have. There are also plenty of other commands that aren't currently supported - notably maintaining the on-chip flash translation layer, flash wear statistics, etc. But read support is fine enough for now; it at least allows for reading the boot / config / calibration flash on my ASUS IPQ4018 based router. Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D48979
85 lines
2.9 KiB
C
85 lines
2.9 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2022 Adrian Chadd <adrian@FreeBSD.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __W25NREG_H__
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#define __W25NREG_H__
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/*
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* Commands
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*/
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#define CMD_READ_STATUS 0x05
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#define CMD_FAST_READ 0x0B
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#define CMD_PAGE_DATA_READ 0x13
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#define CMD_READ_IDENT 0x9F
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#define CMD_LAST_ECC_FAILURE 0xA9
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#define CMD_BLOCK_ERAS 0xD8
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/*
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* Three status registers - 0xAx, 0xBx, 0xCx.
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*
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* status register 1 (0xA0) is for protection config/status
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* status register 2 (0xB0) is for configuration config/status
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* status register 3 (0xC0) is for general status
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*/
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#define STATUS_REG_1 0xA0
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#define STATUS_REG_1_SRP1 0x10
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#define STATUS_REG_1_WP_EN 0x20
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#define STATUS_REG_1_TOP_BOTTOM_PROT 0x40
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#define STATUS_REG_1_BP0 0x80
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#define STATUS_REG_1_BP1 0x10
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#define STATUS_REG_1_BP2 0x20
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#define STATUS_REG_1_BP3 0x40
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#define STATUS_REG_1_SRP0 0x80
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#define STATUS_REG_2 0xB0
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#define STATUS_REG_2_BUF_EN 0x08
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#define STATUS_REG_2_ECC_EN 0x10
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#define STATUS_REG_2_SR1_LOCK 0x20
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#define STATUS_REG_2_OTP_EN 0x40
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#define STATUS_REG_2_OTP_L 0x80
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#define STATUS_REG_3 0xC0
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#define STATUS_REG_3_BUSY 0x01
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#define STATUS_REG_3_WRITE_EN_LATCH 0x02
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#define STATUS_REG_3_ERASE_FAIL 0x04
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#define STATUS_REG_3_PROGRAM_FAIL 0x08
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#define STATUS_REG_3_ECC_STATUS_0 0x10
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#define STATUS_REG_3_ECC_STATUS_1 0x20
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#define STATUS_REG_3_ECC_STATUS_SHIFT 4
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#define STATUS_REG_3_ECC_STATUS_MASK 0x03
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#define STATUS_REG_3_BBM_LUT_FULL 0x40
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/* ECC status */
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#define STATUS_ECC_OK 0
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#define STATUS_ECC_1BIT_OK 1
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#define STATUS_ECC_2BIT_ERR 2
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#define STATUS_ECC_2BIT_ERR_MULTIPAGE 3
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#endif /* __W25NREG_H__ */
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