Emmanuel Vadot 8c8b86922a allwinner: Add a new clock aw_clk_m ... We used the aw_clk_nm clock for clock with only one divider factor and used a fake multiplier factor. This cannot work properly as we end up writing the "fake" factor to the register (and so always set the LSB to 1). Create a new clock for those. The reason for not using the clk_div clock is because those clocks are a bit special. Since they are (almost) all related to video we also need to set the parent clock (the main PLL) to a frequency that they can support. As the main PLL have some minimal frequency that they can support we need to be able to set the main PLL to a multiple of the desired frequency. Let say you want to have a 71Mhz pixel clock (typical for a 1280x800 display) and the main PLL cannot go under 192Mhz, you need to set it to 3 times the desired frequency and set the divider to 3 on the hdmi clock. So this also introduce the CLK_SET_ROUND_MULTIPLE flag that allow for this kind of scenario.		2019-08-10 18:50:37 +00:00
..
clk	allwinner: Add a new clock aw_clk_m	2019-08-10 18:50:37 +00:00
hwreset	Remove redundant declarations. Newer gcc has a warning for these so will	2017-08-19 17:18:27 +00:00
nvmem	nvmem: Add nvmem interface and helpers	2018-07-31 19:08:24 +00:00
phy	extres: Unify error codes for <foo>_get_by_ofw_property() methods.	2019-03-19 14:30:54 +00:00
regulator	extres: Unify error codes for <foo>_get_by_ofw_property() methods.	2019-03-19 14:30:54 +00:00
syscon	Extract eventfilter declarations to sys/_eventfilter.h	2019-05-20 00:38:23 +00:00