mirror of
https://github.com/opnsense/src.git
synced 2026-02-26 03:13:02 -05:00
least the Saturn chips of 501-6738 cards may fail to do so the first time, which isn't fatal though. Reported by: Paul Keusemann - Explain why we don't enable infinite bursts on sparc64. - Given that these chips support memory write invalidate, make sure that it's enabled in the command register. Also make sure that PERR# and SERR# assertion is enabled. MFC after: 1 week |
||
|---|---|---|
| .. | ||
| if_cas.c | ||
| if_casreg.h | ||
| if_casvar.h | ||