opnsense-src/sys/dev/drm2/i915
Konstantin Belousov 1dc72d3681 On some generations of the Intel GPU, disabling of the VGA Display
stops updating the vertical retrace indicator.  The text mouse
renderer in syscons is executing from the callout and spins waiting
for the start of next frame.  As result, after the X server finishes,
since the VGA cannot be turned on, but syscons does not know about
this, the clock swi spins forever.

Hack around the problem by disabling wait for the retrace if KMS is
activated.

Diagnosed and tested by:	Michiel Boland <boland37@xs4all.nl>
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
2013-06-18 20:19:09 +00:00
..
i915_debug.c
i915_dma.c Add drm and i915 ioctl translations for 32 bit process on 64 bit host. 2012-08-18 18:26:25 +00:00
i915_drm.h
i915_drv.c Reduce delays in several wait loops from 10ms to 10us, same is it is done 2012-09-25 10:52:49 +00:00
i915_drv.h Prefer __containerof() above member2struct(). 2012-09-15 19:28:54 +00:00
i915_gem.c Since the gem pagefault handler relocks the vm object lock, other 2013-06-18 20:02:52 +00:00
i915_gem_evict.c
i915_gem_execbuffer.c Disable end of buffer fixup by default. New DDX does not need this, and 2012-05-28 13:58:08 +00:00
i915_gem_gtt.c
i915_gem_tiling.c
i915_ioc32.c Add drm and i915 ioctl translations for 32 bit process on 64 bit host. 2012-08-18 18:26:25 +00:00
i915_irq.c
i915_reg.h
i915_suspend.c
intel_bios.c
intel_bios.h
intel_crt.c
intel_display.c
intel_dp.c
intel_drv.h
intel_fb.c On some generations of the Intel GPU, disabling of the VGA Display 2013-06-18 20:19:09 +00:00
intel_hdmi.c
intel_iic.c drm and i915: Left-shift iic_msg.slave at creation time 2013-04-03 08:27:35 +00:00
intel_lvds.c
intel_modes.c drm and i915: Left-shift iic_msg.slave at creation time 2013-04-03 08:27:35 +00:00
intel_opregion.c
intel_overlay.c
intel_panel.c
intel_ringbuffer.c
intel_ringbuffer.h
intel_sdvo.c drm and i915: Left-shift iic_msg.slave at creation time 2013-04-03 08:27:35 +00:00
intel_sdvo_regs.h
intel_sprite.c
intel_tv.c