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c9790125b5
Bluespec Extensible RISC Implementation (BERI) processor. BERI is a 64-bit MIPS ISA soft CPU core that can be synthesised to Altera and Xilinx FPGAs, and is being used for CPU and OS research at several institutions. Sponsored by: DARPA, AFRL
4 lines
57 B
Text
4 lines
57 B
Text
# $FreeBSD$
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files "../beri/files.beri"
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cpu CPU_MIPS4KC
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