Adrian Chadd c37904e8ba Reshuffle all of the DDR flush operations into a single switch/mux, ... and start teaching subsystems about it. The Atheros MIPS platforms don't guarantee any kind of FIFO consistency with interrupts in hardware. So software needs to do a flush when it receives an interrupt and before it calls the interrupt handler. There are new ones for the QCA934x and QCA955x, so do a few things: * Get rid of the individual ones (for ethernet and IP2); * Create a mux and enum listing all the variations on DDR flushes; * replace the uses of IP2 with the relevant one (which will typically be "PCI" here); * call the USB DDR flush before calling the real USB interrupt handlers; * call the ethernet one upon receiving an interrupt that's for us, rather than never calling it during operation. Tested: * QCA9558 (TP-Link archer c7 v2) * AR9331 (Carambola 2) TODO: * PCI, USB, ethernet, etc need to do a double-check to see if the interrupt was truely for them before doing the DDR. For now I prefer "correct" over "fast".		2015-07-04 03:05:57 +00:00
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adm5120	Add support for the uart classes to set their default register shift value.	2015-04-11 17:16:23 +00:00
alchemy	Fix a typo introduced in r257338.	2013-10-31 02:27:16 +00:00
atheros	Reshuffle all of the DDR flush operations into a single switch/mux,	2015-07-04 03:05:57 +00:00
beri	Provide the number of interrupt resources added to the list	2015-05-15 13:55:18 +00:00
cavium	Huge cleanup of random(4) code.	2015-06-30 17:00:45 +00:00
conf	o Add a description for virtio block device implemented	2015-07-03 14:46:57 +00:00
gxemul	Add 32-bit support for Gxemul's oldtestmips machine emulation	2013-09-04 20:34:36 +00:00
idt	Mechanically convert to if_inc_counter().	2014-09-19 09:19:49 +00:00
include	Retire VM_FREEPOOL_CACHE as the next step in eliminating PG_CACHE pages.	2015-06-08 04:59:32 +00:00
malta	Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this	2013-11-30 22:17:27 +00:00
mips	The kernel sends signals to the processes via ABI specific sv_sendsig method.	2015-05-24 17:56:02 +00:00
nlm	CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten	2015-05-22 17:05:21 +00:00
rmi	CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten	2015-05-22 17:05:21 +00:00
rt305x	Add support for the uart classes to set their default register shift value.	2015-04-11 17:16:23 +00:00
sentry5	Merge from vmobj-rwlock branch:	2013-02-26 01:00:11 +00:00
sibyte	Devices that rely on hints or identify routines for discovery need to	2013-10-29 14:07:31 +00:00