Andrew Turner 66687da666 Decode the arm64 SVE ID register ... The field values are only valid when the ID_AA64PFR0_EL1.SVE or ID_AA64PFR1_EL1.SME vields are non-zero. When this is not the case the register is reserved as zero so is safe to read, but the SVEver field will be incorrect so only print the decoded register when the SVE or SME fields indicate it is valid. Sponsored by: The FreeBSD Foundation (cherry picked from commit cb91f112a3)		2022-07-19 08:03:31 +01:00
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acpica	Remove "All Rights Reserved" from FreeBSD Foundation sys/ copyrights	2022-02-08 15:00:55 -05:00
arm64	Decode the arm64 SVE ID register	2022-07-19 08:03:31 +01:00
broadcom	genet: fix output packet corruption in uncommon case	2022-05-23 06:53:01 -05:00
cavium	Remove "All Rights Reserved" from FreeBSD Foundation sys/ copyrights	2022-02-08 15:00:55 -05:00
cloudabi32	Add infrastructure required for Linux coredump support	2022-05-12 15:12:59 -07:00
cloudabi64	Add infrastructure required for Linux coredump support	2022-05-12 15:12:59 -07:00
conf	pca954x: harmonize pca9547 and pca954x and add pca9540 support	2022-07-18 01:00:20 +00:00
coresight	arm64: clean up empty lines in .c and .h files	2020-09-01 21:18:06 +00:00
freescale/imx	imx7gpc: Remove unused functions	2020-11-16 11:54:38 +00:00
include	Decode the arm64 SVE ID register	2022-07-19 08:03:31 +01:00
intel	Add support for Intel Stratix 10 platform.	2019-09-13 16:50:57 +00:00
iommu	Introduce IOMMU support for arm64 platform.	2020-11-16 21:55:52 +00:00
linux	linux(4): To reuse MD linux.h hide kernel dependencies unde _KERNEL constraint	2022-07-06 14:02:15 +03:00
nvidia/tegra210	tegra: Fix a common typo in source code comments	2022-02-09 07:20:05 +01:00
qoriq	arm64: NXP add LS1088a clockgen support	2022-07-18 00:43:42 +00:00
qualcomm	Enable Qualcomm Debug Subsystem (QDSS) block on MSM8916 SoC.	2018-04-10 12:53:48 +00:00
rockchip	arm: rockchip: rk3288: Use the macros that already exists in rk_cru.h	2022-05-16 17:27:24 +02:00