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opnsense-src/sys/riscv
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Ruslan Bukin 61fef9e860 Grab timer frequency from FDT. 
RISC-V timer has no dedicated DTS node and we have to get timer
frequency from cpus node.

Tested on Government Furnished Equipment (GFE) cores synthesized
on Xilinx VCU118.

Reviewed by:	markj
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D19727
2019-03-27 16:26:03 +00:00
..
conf Configure hz=100 in the QEMU target. 2019-01-03 16:11:21 +00:00
include amd64 KPTI: add control from procctl(2). 2019-03-16 11:44:33 +00:00
riscv Grab timer frequency from FDT. 2019-03-27 16:26:03 +00:00