opnsense-src/sys/x86/include
Konstantin Belousov 2ee49fac82 Add support for Hygon Dhyana Family 18h processor.
As a new x86 CPU vendor, Chengdu Haiguang IC Design Co., Ltd (Hygon)
is a joint venture between AMD and Haiguang Information Technology Co.,
Ltd., aims at providing x86 processors for China server market.

The first generation Hygon processor(Dhyana) shares most architecture
with AMD's family 17h, but with different CPU vendor ID("HygonGenuine")
and PCI vendor ID(0x1d94) and family series number 18h(Hygon negotiated
with AMD to confirm that only Hygon use family 18h).

To enable Hygon Dhyana support in FreeBSD, add new definitions
HYGON_VENDOR_ID("HygonGenuine") and X86_VENDOR_HYGON(0x1d94) to identify
Hygon Dhyana CPU.

Initialize the CPU features(topology, local APIC ext, MSI, TSC, hwpstate,
MCA, DEBUG_CTL, etc) for amd64 and i386 mode by sharing the code path of
AMD family 17h.

The changes have been applied on FreeBSD 13.0-CURRENT and tested
successfully on Hygon Dhyana processor.

References:
[1] Linux kernel patches for Hygon Dhyana, merged in 4.20:

https://git.kernel.org/tip/c9661c1e80b609cd038db7c908e061f0535804ef

[2] MSR and CPUID definition:

https://www.amd.com/system/files/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf

Submitted by:	Pu Wen <puwen@hygon.cn>
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D23163
2020-01-21 13:22:35 +00:00
..
xen
_align.h
_inttypes.h
_limits.h
_stdint.h
_types.h i386: Merge PAE and non-PAE pmaps into same kernel. 2019-01-30 02:07:13 +00:00
acpica_machdep.h
apicreg.h
apicvar.h Drop "All rights reserved" from my copyright statements. 2019-03-06 22:11:45 +00:00
apm_bios.h
bus.h Port the NetBSD KCSAN runtime to FreeBSD. 2019-11-21 11:22:08 +00:00
bus_dma.h bus_dma_dmar_load_ident(9): load identity mapping into the map. 2019-11-27 19:57:17 +00:00
busdma_impl.h Allow loading the same DMA address multiple times without any prior 2019-05-16 17:41:16 +00:00
cputypes.h Add support for Hygon Dhyana Family 18h processor. 2020-01-21 13:22:35 +00:00
dump.h
elf.h Consolidate identical ELF auxargs type defintions. 2018-10-22 22:24:32 +00:00
endian.h
fdt.h
float.h
fpu.h
frame.h
ifunc.h Remove resolver_qual from DEFINE_IFUNC/DEFINE_UIFUNC macros. 2019-05-16 22:20:54 +00:00
init.h x86: improve reservation of AP trampoline memory 2018-04-05 14:39:51 +00:00
intr_machdep.h Drop "All rights reserved" from my copyright statements. 2019-03-06 22:11:45 +00:00
legacyvar.h
mca.h
metadata.h
mptable.h
ofw_machdep.h
pci_cfgreg.h pci_cfgreg.c: Use io port config access for early boot time. 2019-04-09 18:07:17 +00:00
procctl.h amd64 KPTI: add control from procctl(2). 2019-03-16 11:44:33 +00:00
psl.h
ptrace.h
pvclock.h
reg.h Cleanups related to debug exceptions on x86. 2018-05-22 00:45:00 +00:00
segments.h
setjmp.h
sigframe.h
signal.h Remove very old and unused signal information codes. 2018-03-27 20:57:51 +00:00
specialreg.h Add support for Hygon Dhyana Family 18h processor. 2020-01-21 13:22:35 +00:00
stack.h
stdarg.h
sysarch.h Add usermode helpers for for Intel userspace protection keys feature. 2019-02-20 09:56:23 +00:00
trap.h Remove very old and unused signal information codes. 2018-03-27 20:57:51 +00:00
ucode.h Log a message after a successful boot-time microcode update. 2018-09-14 17:04:36 +00:00
ucontext.h Fix a typo. 2018-03-19 17:14:56 +00:00
vdso.h
vmware.h
x86_smp.h x86: store pending bitmapped IPIs in per-cpu areas 2019-05-12 06:36:54 +00:00
x86_var.h Add x86 msr tweak KPI. 2019-11-18 20:53:57 +00:00