Mitchell Horne 3816452eca Revert "riscv: enable allwinner RTC" ... It caused a regression on A10/A20 platforms. Revert until the proper fix can be determined. This reverts commit 9ddd516b88. PR: 285054 Reported by: mmel		2025-03-04 11:25:56 -04:00
..
allwinner	Revert "riscv: enable allwinner RTC"	2025-03-04 11:25:56 -04:00
conf	Revert "riscv: enable allwinner RTC"	2025-03-04 11:25:56 -04:00
eswin	riscv: connect eswin to the build.	2024-12-17 17:42:09 +00:00
include	riscv/stand: pass boot hart in loader metadata	2025-03-03 12:12:15 -04:00
riscv	riscv/stand: pass boot hart in loader metadata	2025-03-03 12:12:15 -04:00
sifive	riscv: Add SiFive CCache driver.	2024-12-17 11:28:25 +00:00
starfive	Add StarFive JH7110's STG clocks	2024-12-16 15:27:23 -04:00
thead	riscv: T-HEAD PBMT support	2024-11-25 17:08:04 -04:00
vmm	vmm: Consolidate code which manages guest memory regions	2025-02-18 16:00:07 +00:00