mirror of
https://github.com/opnsense/src.git
synced 2026-02-12 23:36:07 -05:00
ef8821e5db
It seems there have only been a small amount to the compiler-rt source code in the mean time. I'd rather have the code in sync as much as possible by the time we release 9.0. Changes: - The libcompiler_rt library is now dual licensed under both the University of Illinois "BSD-Like" license and the MIT license. - Our local modifications for using .hidden instead of .private_extern have been upstreamed, meaning our changes to lib/assembly.h can now be reverted. - A possible endless recursion in __modsi3() has been fixed. - Support for ARM EABI has been added, but it has no effect on FreeBSD (yet). - The functions __udivmodsi4 and __divmodsi4 have been added. Requested by: many, including bf@ and Pedro Giffuni
41 lines
1 KiB
C
41 lines
1 KiB
C
/* ===-- clear_cache.c - Implement __clear_cache ---------------------------===
|
|
*
|
|
* The LLVM Compiler Infrastructure
|
|
*
|
|
* This file is dual licensed under the MIT and the University of Illinois Open
|
|
* Source Licenses. See LICENSE.TXT for details.
|
|
*
|
|
* ===----------------------------------------------------------------------===
|
|
*/
|
|
|
|
#include "int_lib.h"
|
|
#include <stdlib.h>
|
|
|
|
#if __APPLE__
|
|
#include <libkern/OSCacheControl.h>
|
|
#endif
|
|
|
|
/*
|
|
* The compiler generates calls to __clear_cache() when creating
|
|
* trampoline functions on the stack for use with nested functions.
|
|
* It is expected to invalidate the instruction cache for the
|
|
* specified range.
|
|
*/
|
|
|
|
void __clear_cache(void* start, void* end)
|
|
{
|
|
#if __i386__ || __x86_64__
|
|
/*
|
|
* Intel processors have a unified instruction and data cache
|
|
* so there is nothing to do
|
|
*/
|
|
#else
|
|
#if __APPLE__
|
|
/* On Darwin, sys_icache_invalidate() provides this functionality */
|
|
sys_icache_invalidate(start, end-start);
|
|
#else
|
|
compilerrt_abort();
|
|
#endif
|
|
#endif
|
|
}
|
|
|