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https://github.com/opnsense/src.git
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03479763b2
available on firmwares 3.15 and earlier. Caveats: Support for the internal SATA controller is currently missing, as is support for framebuffer resolutions other than 720x480. These deficiencies will be remedied soon. Special thanks to Peter Grehan for providing the hardware that made this port possible, and thanks to Geoff Levand of Sony Computer Entertainment for advice on the LV1 hypervisor.
72 lines
2.8 KiB
C
72 lines
2.8 KiB
C
/*-
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* Copyright (C) 2010 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _PS3_LV1CALL_H
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#define _PS3_LV1CALL_H
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#include <machine/pte.h>
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int lv1_get_physmem(uint64_t *maxmem);
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int lv1_setup_address_space(uint64_t *as_id, uint64_t *ptsize);
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int lv1_insert_pte(u_int ptegidx, struct lpte *pte, int lockflags);
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int lv1_panic(int reboot);
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#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_MODE_SET 0x0100
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#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x0101
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#define L1GPU_DISPLAY_SYNC_HSYNC 1
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#define L1GPU_DISPLAY_SYNC_VSYNC 2
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#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x0102
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int lv1_gpu_open(int);
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int lv1_gpu_context_attribute(int context, int op, int, int, int, int);
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int lv1_gpu_memory_allocate(int size, int, int, int, int, uint64_t *handle,
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uint64_t *paddr);
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int lv1_gpu_context_allocate(uint64_t handle, int, uint64_t *context);
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int lv1_open_device(int, int, int /* 0 */);
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int lv1_close_device(int, int);
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int lv1_setup_dma(int, int, uint64_t *dmabase);
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#define GELIC_GET_MAC_ADDRESS 0x0001
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#define GELIC_GET_LINK_STATUS 0x0002
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#define GELIC_LINK_UP 0x0001
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#define GELIC_FULL_DUPLEX 0x0002
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#define GELIC_AUTO_NEG 0x0004
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#define GELIC_SPEED_10 0x0010
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#define GELIC_SPEED_100 0x0020
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#define GELIC_SPEED_1000 0x0040
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#define GELIC_GET_VLAN_ID 0x0004
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int lv1_net_init(int bus, int dev);
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int lv1_net_control(int bus, int dev, int, int, int, int, uint64_t *);
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int lv1_net_start_tx_dma(int bus, int dev, uint32_t addr, int);
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int lv1_net_start_rx_dma(int bus, int dev, uint32_t addr, int);
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int lv1_net_stop_tx_dma(int bus, int dev, int);
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int lv1_net_stop_rx_dma(int bus, int dev, int);
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#endif
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