Ruslan Bukin dee4c1d2a8 Add driver for Xilinx XDMA PCIe Bridge found in the U.S. Government ... Furnished Equipment (GFE) riscv cores. GFE cores are synthesized on the Xilinx Virtex UltraScale+ FPGA VCU118 Evaluation Kit. Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D23337		2020-01-29 16:52:12 +00:00
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axi_quad_spi.c	ofw_spi: Parse property for the SPI mode and CS polarity.	2016-12-18 14:54:20 +00:00
axidma.c	Negate the logic of XCHAN_CAP_NOBUFS macro and rename it to	2019-07-04 14:04:08 +00:00
axidma.h	Add driver for the Xilinx AXI Direct Memory Access (AXI DMA) controller	2019-05-08 15:43:17 +00:00
if_xae.c	Convert to if_foreach_llmaddr() KPI.	2019-10-21 18:12:58 +00:00
if_xaereg.h	Add driver for Xilinx AXI Ethernet tri-mode (10/100/1000 Mb/s) MAC found	2019-05-08 15:36:57 +00:00
if_xaevar.h	Add driver for Xilinx AXI Ethernet tri-mode (10/100/1000 Mb/s) MAC found	2019-05-08 15:36:57 +00:00
xlnx_pcib.c	Add driver for Xilinx XDMA PCIe Bridge found in the U.S. Government	2020-01-29 16:52:12 +00:00
xlnx_pcib.h	Add driver for Xilinx XDMA PCIe Bridge found in the U.S. Government	2020-01-29 16:52:12 +00:00