Konstantin Belousov d98d0ce27a - Move the PG_UNMANAGED flag from m->flags to m->oflags, renaming the flag ... to VPO_UNMANAGED (and also making the flag protected by the vm object lock, instead of vm page queue lock). - Mark the fake pages with both PG_FICTITIOUS (as it is now) and VPO_UNMANAGED. As a consequence, pmap code now can use use just VPO_UNMANAGED to decide whether the page is unmanaged. Reviewed by: alc Tested by: pho (x86, previous version), marius (sparc64), marcel (arm, ia64, powerpc), ray (mips) Sponsored by: The FreeBSD Foundation Approved by: re (bz)		2011-08-09 21:01:36 +00:00
..
clock.c	After some off-list discussion, revert a number of changes to the	2010-11-22 19:32:54 +00:00
copyinout.c	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
interrupt.c	Remove some dead code: unnecessary isyncs and memory sorting, which are	2011-06-02 14:15:44 +00:00
locore.S	MFppc64:	2010-07-13 05:32:19 +00:00
locore32.S	This a follow up commit from r224216 for powerpc 32-bit. Increase	2011-07-25 20:10:01 +00:00
locore64.S	On 64 bit architectures size_t is 8 bytes, thus it should use an 8 bytes	2011-07-19 12:41:57 +00:00
machdep.c	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
mmu_oea.c	- Move the PG_UNMANAGED flag from m->flags to m->oflags, renaming the flag	2011-08-09 21:01:36 +00:00
mmu_oea64.c	- Move the PG_UNMANAGED flag from m->flags to m->oflags, renaming the flag	2011-08-09 21:01:36 +00:00
mmu_oea64.h	Add an abstraction layer to the 64-bit AIM MMU's page table manipulation	2010-12-04 02:42:52 +00:00
moea64_if.m	Add an abstraction layer to the 64-bit AIM MMU's page table manipulation	2010-12-04 02:42:52 +00:00
moea64_native.c	Remove some dead code: unnecessary isyncs and memory sorting, which are	2011-06-02 14:15:44 +00:00
mp_cpudep.c	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
nexus.c	Remove unused variables. Spotted by a cppcheck	2011-01-06 20:19:01 +00:00
slb.c	The POWER7 has only 32 SLB slots instead of 64, like other supported	2011-06-02 14:25:52 +00:00
swtch32.S	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
swtch64.S	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
trap.c	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
trap_subr32.S	Revert r223479. It is unnecessary and served only to slightly ameliorate	2011-06-26 15:08:14 +00:00
trap_subr64.S	Revert r223479. It is unnecessary and served only to slightly ameliorate	2011-06-26 15:08:14 +00:00
uma_machdep.c	Reduce KVA pressure on OEA64 systems running in bridge mode by mapping	2010-02-20 16:23:29 +00:00
vm_machdep.c	For architectures not using direct map , and requiring real KVA page for	2011-01-18 21:57:02 +00:00