opnsense-src/sys/powerpc/aim
Leandro Lupori 019cdd20bb powerpc64: add missing TLB invalidations to radix
Radix MMU code was missing TLB invalidations when some Level 3 PDEs were
modified. This caused TLB multi-hit machine check interrupts when
superpages were enabled.

Reviewed by:		jhibbits
Sponsored by:		Eldorado Research Institute (eldorado.org.br)
Differential Revision:	https://reviews.freebsd.org/D29511

(cherry picked from commit 28d14569c8)
2021-04-22 11:31:31 -03:00
..
aim_machdep.c powerpc/aim: Update timebase directly on resume instead of through platform 2021-04-19 23:13:56 -05:00
locore.S Add CFI start/end proc directives to arm64, i386, and ppc 2020-12-05 00:33:28 +00:00
locore32.S powerpc64: Add a trap stack area 2019-02-04 16:02:03 +00:00
locore64.S powerpc64: Fix boot on virtual-mode OF (PowerMac G5) 2021-02-09 21:19:45 -06:00
mmu_oea.c [PowerPC] Implement pmap_mincore() for moea 2020-09-13 16:46:03 +00:00
mmu_oea64.c powerpc64: clear low-order bits of ARPN 2021-04-22 11:29:15 -03:00
mmu_oea64.h Implement superpages for PowerPC64 (HPT) 2020-11-06 14:12:45 +00:00
mmu_radix.c powerpc64: add missing TLB invalidations to radix 2021-04-22 11:31:31 -03:00
moea64_native.c [PowerPC] Fix powerpc64le boot after HPT superpages addition 2020-11-08 23:34:06 +00:00
mp_cpudep.c powerpc/aim: Update timebase directly on resume instead of through platform 2021-04-19 23:13:56 -05:00
slb.c powerpc: clean up empty lines in .c and .h files 2020-09-01 21:20:08 +00:00
trap_subr32.S [PowerPC] Fix invalid asm in trap code 2020-05-27 00:17:05 +00:00
trap_subr64.S Add CFI start/end proc directives to arm64, i386, and ppc 2020-12-05 00:33:28 +00:00