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opnsense-src/sys/dev/ciss
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Scott Long 8792c6abd8 Correctly set the interrupt enable and disable bits. The previous 
code interfered with Performant mode and legacy interrupts.  Also
remove a register read operation on the Simplq code that was
effectively a time-wasting no-op.
2008-08-02 13:04:26 +00:00
..
ciss.c Correctly set the interrupt enable and disable bits. The previous 2008-08-02 13:04:26 +00:00
cissio.h A number of significant enhancements to the ciss driver: 2008-07-11 21:20:51 +00:00
cissreg.h Correctly set the interrupt enable and disable bits. The previous 2008-08-02 13:04:26 +00:00
cissvar.h A number of significant enhancements to the ciss driver: 2008-07-11 21:20:51 +00:00