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4a338afd7a
I was in two minds as to where to put them in the first case.. I should have listenned to the other mind. Submitted by: parts by davidxu@ Reviewed by: jeff@ mini@
384 lines
9 KiB
ArmAsm
384 lines
9 KiB
ArmAsm
/*
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* Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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* $NetBSD: locore.s,v 1.47 1998/03/22 07:26:32 thorpej Exp $
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* $FreeBSD$
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*/
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#include <machine/asm.h>
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#include <assym.s>
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/**************************************************************************/
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/*
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* XentArith:
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* System arithmetic trap entry point.
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*/
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PALVECT(XentArith) /* setup frame, save registers */
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/* a0, a1, & a2 already set up */
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ldiq a3, ALPHA_KENTRY_ARITH
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mov sp, a4 ; .loc 1 __LINE__
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CALL(trap)
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jmp zero, exception_return
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END(XentArith)
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/**************************************************************************/
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/*
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* XentIF:
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* System instruction fault trap entry point.
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*/
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PALVECT(XentIF) /* setup frame, save registers */
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/* a0, a1, & a2 already set up */
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ldiq a3, ALPHA_KENTRY_IF
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mov sp, a4 ; .loc 1 __LINE__
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CALL(trap)
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jmp zero, exception_return
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END(XentIF)
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/**************************************************************************/
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/*
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* XentInt:
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* System interrupt entry point.
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*/
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PALVECT(XentInt) /* setup frame, save registers */
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/* a0, a1, & a2 already set up */
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mov sp, a3 ; .loc 1 __LINE__
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CALL(interrupt)
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jmp zero, exception_return
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END(XentInt)
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/**************************************************************************/
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/*
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* XentMM:
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* System memory management fault entry point.
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*/
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PALVECT(XentMM) /* setup frame, save registers */
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/* a0, a1, & a2 already set up */
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ldiq a3, ALPHA_KENTRY_MM
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mov sp, a4 ; .loc 1 __LINE__
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CALL(trap)
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jmp zero, exception_return
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END(XentMM)
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/**************************************************************************/
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/*
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* XentSys:
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* System call entry point.
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*/
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ESETUP(XentSys) ; .loc 1 __LINE__
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stq v0,(FRAME_V0*8)(sp) /* in case we need to restart */
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stq s0,(FRAME_S0*8)(sp)
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stq s1,(FRAME_S1*8)(sp)
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stq s2,(FRAME_S2*8)(sp)
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stq s3,(FRAME_S3*8)(sp)
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stq s4,(FRAME_S4*8)(sp)
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stq s5,(FRAME_S5*8)(sp)
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stq s6,(FRAME_S6*8)(sp)
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stq a3,(FRAME_A3*8)(sp)
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stq a4,(FRAME_A4*8)(sp)
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stq a5,(FRAME_A5*8)(sp)
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stq ra,(FRAME_RA*8)(sp)
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stq a0,(FRAME_A0*8)(sp)
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stq a1,(FRAME_A1*8)(sp)
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stq a2,(FRAME_A2*8)(sp)
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ldiq t1,FRAME_FLAGS_SYSCALL
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stq t1,(FRAME_FLAGS*8)(sp)
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/* syscall number, passed in v0, is first arg, frame pointer second */
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mov v0,a0
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mov sp,a1 ; .loc 1 __LINE__
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br pv,1f
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1: LDGP(pv)
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CALL(syscall)
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/* Handle any AST's. */
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2: ldiq a0, ALPHA_PSL_IPL_HIGH /* disable all interrupts */
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call_pal PAL_OSF1_swpipl
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ldq s0, PC_CURTHREAD(pcpup) /* checking for pending asts */
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ldl s1, TD_FLAGS(s0)
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ldiq s2, TDF_ASTPENDING | TDF_NEEDRESCHED
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and s1, s2
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beq s1, 3f
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ldiq a0, ALPHA_PSL_IPL_0 /* reenable interrupts */
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call_pal PAL_OSF1_swpipl
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mov sp, a0 /* only arg is frame */
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CALL(ast)
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jmp zero, 2b
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/* see if we need a full exception_return */
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3: ldq t1, (FRAME_FLAGS*8)(sp)
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and t1, FRAME_FLAGS_SYSCALL
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beq t1, exception_return
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/* set the hae register if this process has specified a value */
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ldq t1, TD_MD_FLAGS(s0)
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and t1, MDTD_HAEUSED
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beq t1, 3f
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ldq a0, TD_MD_HAE(s0)
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ldq pv, chipset + CHIPSET_WRITE_HAE
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CALL((pv))
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3:
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#ifdef SMP
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/* leave the kernel */
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stl zero, TD_MD_KERNNEST(s0)
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#endif
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/* restore the registers, and return */
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ldq v0,(FRAME_V0*8)(sp)
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ldq s0,(FRAME_S0*8)(sp)
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ldq s1,(FRAME_S1*8)(sp)
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ldq s2,(FRAME_S2*8)(sp)
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ldq s3,(FRAME_S3*8)(sp)
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ldq s4,(FRAME_S4*8)(sp)
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ldq s5,(FRAME_S5*8)(sp)
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ldq s6,(FRAME_S6*8)(sp)
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ldq a3,(FRAME_A3*8)(sp)
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ldq a4,(FRAME_A4*8)(sp)
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ldq a5,(FRAME_A5*8)(sp)
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ldq ra,(FRAME_RA*8)(sp)
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ldq a0,(FRAME_A0*8)(sp)
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ldq a1,(FRAME_A1*8)(sp)
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ldq a2,(FRAME_A2*8)(sp)
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lda sp,(FRAME_SW_SIZE*8)(sp)
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call_pal PAL_OSF1_retsys
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END(XentSys)
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/**************************************************************************/
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/*
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* XentUna:
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* System unaligned access entry point.
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*/
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LEAF(XentUna, 3) /* XXX should be NESTED */
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.set noat
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lda sp,-(FRAME_SW_SIZE*8)(sp)
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stq at_reg,(FRAME_AT*8)(sp)
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.set at
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stq ra,(FRAME_RA*8)(sp)
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bsr ra, exception_save_regs /* jmp/CALL trashes pv/t12 */
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/* a0, a1, & a2 already set up */
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ldiq a3, ALPHA_KENTRY_UNA
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mov sp, a4 ; .loc 1 __LINE__
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br pv, 1f
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1: LDGP(pv)
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CALL(trap)
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jmp zero, exception_return
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END(XentUna)
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/**************************************************************************/
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/*
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* console 'restart' routine to be placed in HWRPB.
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*/
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LEAF(XentRestart, 1) /* XXX should be NESTED */
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.set noat
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lda sp,-(FRAME_SIZE*8)(sp)
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stq at_reg,(FRAME_AT*8)(sp)
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.set at
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stq v0,(FRAME_V0*8)(sp)
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stq a3,(FRAME_A3*8)(sp)
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stq a4,(FRAME_A4*8)(sp)
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stq a5,(FRAME_A5*8)(sp)
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stq s0,(FRAME_S0*8)(sp)
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stq s1,(FRAME_S1*8)(sp)
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stq s2,(FRAME_S2*8)(sp)
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stq s3,(FRAME_S3*8)(sp)
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stq s4,(FRAME_S4*8)(sp)
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stq s5,(FRAME_S5*8)(sp)
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stq s6,(FRAME_S6*8)(sp)
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stq t0,(FRAME_T0*8)(sp)
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stq t1,(FRAME_T1*8)(sp)
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stq t2,(FRAME_T2*8)(sp)
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stq t3,(FRAME_T3*8)(sp)
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stq t4,(FRAME_T4*8)(sp)
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stq t5,(FRAME_T5*8)(sp)
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stq t6,(FRAME_T6*8)(sp)
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stq t7,(FRAME_T7*8)(sp)
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stq t8,(FRAME_T8*8)(sp)
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stq t9,(FRAME_T9*8)(sp)
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stq t10,(FRAME_T10*8)(sp)
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stq t11,(FRAME_T11*8)(sp)
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stq t12,(FRAME_T12*8)(sp)
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stq ra,(FRAME_RA*8)(sp)
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br pv,1f
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1: LDGP(pv)
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ldq a0,(FRAME_RA*8)(sp) /* a0 = ra */
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ldq a1,(FRAME_T11*8)(sp) /* a1 = ai */
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ldq a2,(FRAME_T12*8)(sp) /* a2 = pv */
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CALL(console_restart)
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call_pal PAL_halt
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END(XentRestart)
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/*
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* exception_return: return from trap, exception, or syscall
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*/
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LEAF(exception_return, 1) /* XXX should be NESTED */
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br pv, Ler1
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Ler1: LDGP(pv)
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ldq s0, PC_CURTHREAD(pcpup) /* save curthread in s0 */
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#ifdef SMP
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ldl s1, TD_MD_KERNNEST(s0)
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subl s1, 1, s1 /* decrement nesting level */
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#endif
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ldq t1, (FRAME_PS * 8)(sp) /* get the saved PS */
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and t1, ALPHA_PSL_USERMODE, t0 /* are we returning to user? */
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beq t0, Lkernelret /* no: kernel return */
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/* Handle any AST's or resched's. */
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1: ldiq a0, ALPHA_PSL_IPL_HIGH /* disable all interrupts */
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call_pal PAL_OSF1_swpipl
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ldl s2, TD_FLAGS(s0) /* atomically with returning */
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ldiq s3, TDF_ASTPENDING | TDF_NEEDRESCHED
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and s2, s3
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beq s2, 2f
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ldiq a0, ALPHA_PSL_IPL_0 /* reenable interrupts */
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call_pal PAL_OSF1_swpipl
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mov sp, a0 /* only arg is frame */
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CALL(ast)
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jmp zero, 1b
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2:
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#ifdef SMP
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br Lrestoreregs
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#endif
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Lkernelret:
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#ifdef SMP
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beq s1, Lrestoreregs
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stq pcpup, (FRAME_T7*8)(sp) /* fixup pcpup */
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#endif
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Lrestoreregs:
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/* set the hae register if this process has specified a value */
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ldq t1, TD_MD_FLAGS(s0)
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and t1, MDTD_HAEUSED
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beq t1, Lnohae
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ldq a0, TD_MD_HAE(t0)
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ldq pv, chipset + CHIPSET_WRITE_HAE
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CALL((pv))
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Lnohae:
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#ifdef SMP
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/* leave the kernel */
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stl s1, TD_MD_KERNNEST(s0)
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#endif
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/* restore the registers, and return */
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bsr ra, exception_restore_regs /* jmp/CALL trashes pv/t12 */
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ldq ra,(FRAME_RA*8)(sp)
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.set noat
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ldq at_reg,(FRAME_AT*8)(sp)
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lda sp,(FRAME_SW_SIZE*8)(sp)
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call_pal PAL_OSF1_rti
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.set at
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END(exception_return)
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LEAF(exception_save_regs, 0)
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stq v0,(FRAME_V0*8)(sp)
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stq a3,(FRAME_A3*8)(sp)
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stq a4,(FRAME_A4*8)(sp)
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stq a5,(FRAME_A5*8)(sp)
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stq s0,(FRAME_S0*8)(sp)
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stq s1,(FRAME_S1*8)(sp)
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stq s2,(FRAME_S2*8)(sp)
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stq s3,(FRAME_S3*8)(sp)
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stq s4,(FRAME_S4*8)(sp)
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stq s5,(FRAME_S5*8)(sp)
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stq s6,(FRAME_S6*8)(sp)
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stq t0,(FRAME_T0*8)(sp)
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stq t1,(FRAME_T1*8)(sp)
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stq t2,(FRAME_T2*8)(sp)
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stq t3,(FRAME_T3*8)(sp)
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stq t4,(FRAME_T4*8)(sp)
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stq t5,(FRAME_T5*8)(sp)
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stq t6,(FRAME_T6*8)(sp)
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stq t7,(FRAME_T7*8)(sp)
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stq t8,(FRAME_T8*8)(sp)
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stq t9,(FRAME_T9*8)(sp)
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stq t10,(FRAME_T10*8)(sp)
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stq t11,(FRAME_T11*8)(sp)
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stq t12,(FRAME_T12*8)(sp)
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.set noat
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lda at_reg,(FRAME_SIZE*8)(sp)
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stq at_reg,(FRAME_SP*8)(sp)
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.set at
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stq zero,(FRAME_FLAGS*8)(sp)
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RET
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END(exception_save_regs)
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LEAF(exception_restore_regs, 0)
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ldq v0,(FRAME_V0*8)(sp)
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ldq a3,(FRAME_A3*8)(sp)
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ldq a4,(FRAME_A4*8)(sp)
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ldq a5,(FRAME_A5*8)(sp)
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ldq s0,(FRAME_S0*8)(sp)
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ldq s1,(FRAME_S1*8)(sp)
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ldq s2,(FRAME_S2*8)(sp)
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ldq s3,(FRAME_S3*8)(sp)
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ldq s4,(FRAME_S4*8)(sp)
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ldq s5,(FRAME_S5*8)(sp)
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ldq s6,(FRAME_S6*8)(sp)
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ldq t0,(FRAME_T0*8)(sp)
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ldq t1,(FRAME_T1*8)(sp)
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ldq t2,(FRAME_T2*8)(sp)
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ldq t3,(FRAME_T3*8)(sp)
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ldq t4,(FRAME_T4*8)(sp)
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ldq t5,(FRAME_T5*8)(sp)
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ldq t6,(FRAME_T6*8)(sp)
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ldq t7,(FRAME_T7*8)(sp)
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ldq t8,(FRAME_T8*8)(sp)
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ldq t9,(FRAME_T9*8)(sp)
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ldq t10,(FRAME_T10*8)(sp)
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ldq t11,(FRAME_T11*8)(sp)
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ldq t12,(FRAME_T12*8)(sp)
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RET
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END(exception_restore_regs)
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