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NetBSD and OpenBSD have libc wrapper functions for the ARM_SYNC_ICACHE and ARM_DRAIN_WRITEBUF sysarch operations. This change adds compatible functions to our library. This should make it easier for various upstream sources to support *BSD operating systems with a single variation of cache maintence code in tools like interpreters and JIT compilers. I consider the argument types passed to arm_sync_icache() to be especially unfortunate, but this is intended to match the other BSDs. Differential Revision: https://reviews.freebsd.org/D20906
77 lines
2.9 KiB
Groff
77 lines
2.9 KiB
Groff
.\" Copyright (c) 2019 Ian Lepore <ian@FreeBSD.org>
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd July 10, 2019
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.Dt ARM_DRAIN_WRITEBUF 2
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.Os
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.Sh NAME
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.Nm arm_drain_writebuf
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.Nd drain pending writes from cores and caches
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.Sh LIBRARY
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.Lb libc
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.Sh SYNOPSIS
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.In machine/sysarch.h
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.Ft int
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.Fn arm_drain_writebuf void
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.Sh DESCRIPTION
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The
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.Nm
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system call causes all pending writes from ARM cores and caches to be
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written out to main memory or memory-mapped I/O registers.
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Not all hardware supports buffered writes; on such systems the
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.Nm
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function is a no-op.
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.Pp
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On ARMv5 systems, this executes a cp15 coprocessor
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.Dq drain write buffer
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operation.
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On ARMv6 and ARMv7 systems, this executes a
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.Dq DSB SY
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synchronization barrier, followed by an L2 cache drain on
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systems where the DSB does not include L2 automatically.
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.Pp
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.Nm
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attempts to wait for the drain operation to complete, but cannot
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guarantee the writes have reached their ultimate destination on all hardware.
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For example, on an ARMv7 system,
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.Nm
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tells the L2 cache controller to drain its buffers, and it waits until
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the controller indicates that operation is complete.
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However, all the L2 controller knows is that the data was accepted for
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delivery by the AXI bus.
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If the ultimate destination of the write is a device on a subordinate
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bus connected to the AXI bus, more buffering or other delays may occur
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on that subordinate bus.
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The only way to be certain a pending write has reached its
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ultimate destination is to issue a read from that destination after
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.Nm
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returns.
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.Sh RETURN VALUES
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The
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.Nm
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system call cannot fail, and always returns 0.
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.Sh AUTHORS
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This man page was written by
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.An Ian Lepore .
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