mirror of
https://github.com/opnsense/src.git
synced 2026-04-04 17:05:14 -04:00
The controller requires some custom logic to perform MMC tuning and to later switch to HS400 mode. Implement it supplying mmcbr_tune and sdhci_set_uhs_timing devmethods respectivly. Since the latter is called unconditionally when the ios is updated we need to keep track of the tuning state in sc and execute the HS400 switch logic only when required. Two HS200/HS400 related errata were implemented. 1. In HS400 modes the clock divisors are limited to 4, 8, 12. Apply it by falling back to the closes, higher divider when needed. 2. Hardware tuning procedure can sometimes fails. If that is the case fallback to the software tuning. Reviewed by: manu, mw Obtained from: Semihalf Sponsored by: Alstom Group Differential revision: https://reviews.freebsd.org/D33320 |
||
|---|---|---|
| .. | ||
| fsl_sdhci.c | ||
| sdhci.c | ||
| sdhci.h | ||
| sdhci_acpi.c | ||
| sdhci_fdt.c | ||
| sdhci_fdt_gpio.c | ||
| sdhci_fdt_gpio.h | ||
| sdhci_fsl_fdt.c | ||
| sdhci_if.m | ||
| sdhci_pci.c | ||
| sdhci_xenon.c | ||
| sdhci_xenon.h | ||
| sdhci_xenon_acpi.c | ||
| sdhci_xenon_fdt.c | ||