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79 lines
3 KiB
C
79 lines
3 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/* Copyright(c) 2007-2022 Intel Corporation */
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#ifndef ADF_DEV_ERR_H_
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#define ADF_DEV_ERR_H_
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#include <sys/types.h>
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#include <dev/pci/pcivar.h>
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#include "adf_accel_devices.h"
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#define ADF_ERRSOU0 (0x3A000 + 0x00)
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#define ADF_ERRSOU1 (0x3A000 + 0x04)
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#define ADF_ERRSOU2 (0x3A000 + 0x08)
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#define ADF_ERRSOU3 (0x3A000 + 0x0C)
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#define ADF_ERRSOU4 (0x3A000 + 0xD0)
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#define ADF_ERRSOU5 (0x3A000 + 0xD8)
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#define ADF_ERRMSK0 (0x3A000 + 0x10)
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#define ADF_ERRMSK1 (0x3A000 + 0x14)
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#define ADF_ERRMSK2 (0x3A000 + 0x18)
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#define ADF_ERRMSK3 (0x3A000 + 0x1C)
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#define ADF_ERRMSK4 (0x3A000 + 0xD4)
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#define ADF_ERRMSK5 (0x3A000 + 0xDC)
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#define ADF_EMSK3_CPM0_MASK BIT(2)
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#define ADF_EMSK3_CPM1_MASK BIT(3)
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#define ADF_EMSK5_CPM2_MASK BIT(16)
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#define ADF_EMSK5_CPM3_MASK BIT(17)
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#define ADF_EMSK5_CPM4_MASK BIT(18)
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#define ADF_RICPPINTSTS (0x3A000 + 0x114)
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#define ADF_RIERRPUSHID (0x3A000 + 0x118)
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#define ADF_RIERRPULLID (0x3A000 + 0x11C)
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#define ADF_CPP_CFC_ERR_STATUS (0x30000 + 0xC04)
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#define ADF_CPP_CFC_ERR_PPID (0x30000 + 0xC08)
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#define ADF_TICPPINTSTS (0x3A400 + 0x13C)
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#define ADF_TIERRPUSHID (0x3A400 + 0x140)
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#define ADF_TIERRPULLID (0x3A400 + 0x144)
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#define ADF_SECRAMUERR (0x3AC00 + 0x04)
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#define ADF_SECRAMUERRAD (0x3AC00 + 0x0C)
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#define ADF_CPPMEMTGTERR (0x3AC00 + 0x10)
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#define ADF_ERRPPID (0x3AC00 + 0x14)
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#define ADF_INTSTATSSM(i) ((i)*0x4000 + 0x04)
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#define ADF_INTSTATSSM_SHANGERR BIT(13)
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#define ADF_PPERR(i) ((i)*0x4000 + 0x08)
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#define ADF_PPERRID(i) ((i)*0x4000 + 0x0C)
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#define ADF_CERRSSMSH(i) ((i)*0x4000 + 0x10)
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#define ADF_UERRSSMSH(i) ((i)*0x4000 + 0x18)
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#define ADF_UERRSSMSHAD(i) ((i)*0x4000 + 0x1C)
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#define ADF_SLICEHANGSTATUS(i) ((i)*0x4000 + 0x4C)
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#define ADF_SLICE_HANG_AUTH0_MASK BIT(0)
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#define ADF_SLICE_HANG_AUTH1_MASK BIT(1)
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#define ADF_SLICE_HANG_AUTH2_MASK BIT(2)
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#define ADF_SLICE_HANG_CPHR0_MASK BIT(4)
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#define ADF_SLICE_HANG_CPHR1_MASK BIT(5)
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#define ADF_SLICE_HANG_CPHR2_MASK BIT(6)
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#define ADF_SLICE_HANG_CMP0_MASK BIT(8)
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#define ADF_SLICE_HANG_CMP1_MASK BIT(9)
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#define ADF_SLICE_HANG_XLT0_MASK BIT(12)
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#define ADF_SLICE_HANG_XLT1_MASK BIT(13)
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#define ADF_SLICE_HANG_MMP0_MASK BIT(16)
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#define ADF_SLICE_HANG_MMP1_MASK BIT(17)
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#define ADF_SLICE_HANG_MMP2_MASK BIT(18)
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#define ADF_SLICE_HANG_MMP3_MASK BIT(19)
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#define ADF_SLICE_HANG_MMP4_MASK BIT(20)
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#define ADF_SSMWDT(i) ((i)*0x4000 + 0x54)
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#define ADF_SSMWDTPKE(i) ((i)*0x4000 + 0x58)
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#define ADF_SHINTMASKSSM(i) ((i)*0x4000 + 0x1018)
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#define ADF_ENABLE_SLICE_HANG 0x000000
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#define ADF_MAX_MMP (5)
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#define ADF_MMP_BASE(i) ((i)*0x1000 % 0x3800)
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#define ADF_CERRSSMMMP(i, n) ((i)*0x4000 + ADF_MMP_BASE(n) + 0x380)
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#define ADF_UERRSSMMMP(i, n) ((i)*0x4000 + ADF_MMP_BASE(n) + 0x388)
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#define ADF_UERRSSMMMPAD(i, n) ((i)*0x4000 + ADF_MMP_BASE(n) + 0x38C)
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bool adf_handle_slice_hang(struct adf_accel_dev *accel_dev,
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u8 accel_num,
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struct resource *csr,
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u32 slice_hang_offset);
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bool adf_check_slice_hang(struct adf_accel_dev *accel_dev);
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void adf_print_err_registers(struct adf_accel_dev *accel_dev);
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#endif
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