opnsense-src/sys/riscv/sifive
Ruslan Bukin 6766e8ceb5 riscv: Add SiFive CCache driver.
Eswin EIC7700 has non-coherent DMAs but predate the standard RISC-V Zicbom
extension, so we need to use the SiFive CCache controller for non-standard
cache management operations.

Tested on SiFive Premier P550.

Reviewed by: mhorne, jrtc27
Differential Revision: https://reviews.freebsd.org/D47831
2024-12-17 11:28:25 +00:00
..
fe310_aon.c sys: Automated cleanup of cdefs and other formatting 2023-11-26 22:24:00 -07:00
files.sifive sys: Remove $FreeBSD$: one-line sh pattern 2023-08-16 11:54:58 -06:00
fu740_pci_dw.c Replace calls to bus_generic_attach with bus_attach_children 2024-12-06 17:26:16 -05:00
sifive_ccache.c riscv: Add SiFive CCache driver. 2024-12-17 11:28:25 +00:00
sifive_gpio.c sys: Automated cleanup of cdefs and other formatting 2023-11-26 22:24:00 -07:00
sifive_prci.c clk: Move clock code in dev/clk 2024-01-10 19:20:26 +01:00
sifive_spi.c Use bus_delayed_attach_children instead of its inline implementation 2024-10-21 10:24:39 -04:00
sifive_uart.c clk: Move clock code in dev/clk 2024-01-10 19:20:26 +01:00