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e9fa399180
The T-HEAD custom PTE bits are defined in such a way that the default/normal memory type is non-zero value. This _unthoughtful_ choice means that, unlike the Svpbmt and non-Svpbmt cases, this field cannot be left bare in our bootstrap PTEs, or the hardware will fail to proceed far enough in boot (cache strangeness). On the other hand, we cannot unconditionally apply the PTE_THEAD_MA_NONE attributes, as this is not compatible with spec-compliant RISC-V hardware, and will result in a fatal exception. Therefore, in order to handle this errata, we are forced to perform a check of the CPU type at the first moment possible. Do so, and fix up the PTEs with the correct memory attribute bits in the T-HEAD case. Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D47458
77 lines
2.7 KiB
C
77 lines
2.7 KiB
C
/*-
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* Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Portions of this software were developed by SRI International and the
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* University of Cambridge Computer Laboratory under DARPA/AFRL contract
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* FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Portions of this software were developed by the University of Cambridge
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* Computer Laboratory as part of the CTSRD Project, with support from the
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* UK Higher Education Innovation Fund (HEIF).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _MACHINE_ASM_H_
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#define _MACHINE_ASM_H_
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#undef __FBSDID
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#if !defined(lint) && !defined(STRIP_FBSDID)
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#define __FBSDID(s) .ident s
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#else
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#define __FBSDID(s) /* nothing */
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#endif /* not lint and not STRIP_FBSDID */
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#define _C_LABEL(x) x
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#define ENTRY(sym) \
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.text; .globl sym; .type sym,@function; .align 4; sym: .cfi_startproc;
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#define END(sym) .cfi_endproc; .size sym, . - sym
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#define EENTRY(sym) \
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.globl sym; sym:
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#define EEND(sym)
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#define WEAK_REFERENCE(sym, alias) \
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.weak alias; \
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.set alias,sym
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#define SET_FAULT_HANDLER(handler, tmp) \
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ld tmp, PC_CURTHREAD(tp); \
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ld tmp, TD_PCB(tmp); /* Load the pcb */ \
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sd handler, PCB_ONFAULT(tmp) /* Set the handler */
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#define ENTER_USER_ACCESS(tmp) \
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li tmp, SSTATUS_SUM; \
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csrs sstatus, tmp
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#define EXIT_USER_ACCESS(tmp) \
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li tmp, SSTATUS_SUM; \
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csrc sstatus, tmp
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#define SBI_CALL(ext, func) \
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li a7, ext; \
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li a6, func; \
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ecall
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#endif /* _MACHINE_ASM_H_ */
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